SLASFC6A August   2024  – August 2025 TAS2120

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
      1. 6.3.1 Operational Modes
        1. 6.3.1.1 Hardware Shutdown
        2. 6.3.1.2 Hardware Config Modes
        3. 6.3.1.3 Software Power Modes Control and Software Reset
        4. 6.3.1.4 Efficiency and power saving modes
          1. 6.3.1.4.1 Noise Gate
          2. 6.3.1.4.2 Music Efficiency Mode
          3. 6.3.1.4.3 VDD Y-bridge
          4. 6.3.1.4.4 Class-H Boost
        5. 6.3.1.5 2S Battery Mode
        6. 6.3.1.6 External PVDD Mode
      2. 6.3.2 Faults and Status
        1. 6.3.2.1 Interrupt generation and clearing
    4. 6.4 Feature Description
      1. 6.4.1  PurePath™ Console 3 Software
      2. 6.4.2  Playback Signal Path
        1. 6.4.2.1 Digital Volume Control and Amplifier Output Level
        2. 6.4.2.2 High Pass Filter
        3. 6.4.2.3 Class-D Amplifier
        4. 6.4.2.4 Supply Tracking Limiters with Brown Out Prevention
          1. 6.4.2.4.1 Voltage Limiter and Clipping protection
        5. 6.4.2.5 Tone Generator
      3. 6.4.3  Digital Audio Serial Interface
        1. 6.4.3.1 Digital Loopback
      4. 6.4.4  Internal Boost
      5. 6.4.5  Boost Share
      6. 6.4.6  External Class-H Boost Controller
      7. 6.4.7  Supply Voltage Monitors
      8. 6.4.8  Thermal Protection
      9. 6.4.9  Clocks and PLL
        1. 6.4.9.1 Auto clock based wakeup and clock errors
      10. 6.4.10 Digital IO pins
    5. 6.5 Programming
      1. 6.5.1 I2C Control Interface
      2. 6.5.2 I2C Address Selection
      3. 6.5.3 General I2C Operation
      4. 6.5.4 I2C Single-Byte and Multiple-Byte Transfers
      5. 6.5.5 I2C Single-Byte Write
      6. 6.5.6 I2C Multiple-Byte Write
      7. 6.5.7 I2C Single-Byte Read
      8. 6.5.8 I2C Multiple-Byte Read
  8. 7 Register Maps
    1. 7.1  PAGE 0 Registers
    2. 7.2  PAGE 1 Registers
    3. 7.3  PAGE 2 Registers
    4. 7.4  PAGE 3 Registers
    5. 7.5  PAGE 4 Registers
    6. 7.6  PAGE 5 Registers
    7. 7.7  PAGE 6 Registers
    8. 7.8  PAGE 7 Registers
    9. 7.9  PAGE 8 Registers
    10. 7.10 BOOK100 PAGE9 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Mono/Stereo Configuration
        2. 8.2.2.2 Boost Converter Passive Devices
        3. 8.2.2.3 EMI Passive Devices
        4. 8.2.2.4 Miscellaneous Passive Devices
      3. 8.2.3 Application Performance Plots
    3. 8.3 What to Do and What Not to Do
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.8 Typical Characteristics

TA = 25°C, VBAT = 3.6V, VBAT2S = 7.2V (2S mode enabled), PVDD = 12V ( External PVDD mode enabled), VDD = 1.8V, IOVDD = 1.8V, LBOOST (1S Boost mode) = 1μH, Fin = 1kHz, Fs = 48kHz, Gain = 21dBV, BST_ILIM (1S Boost mode) = 5.1A, BST_ILIM (2S Boost, HW mode) = 4.1A, BST_ILIM (2S Boost, I2C mode) = 5.1A, SDZ=1, Noise gate disabled, Class-D edge rate set to 2V/ns, I2C mode of operation, Measured filter free with an Audio Precision using 22Hz to 20kHz un-weighted bandwidth (unlessotherwise noted).

TAS2120 THD+N vs Output Power

RL = 8Ω 1S Boost Mode

Figure 5-3 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 8Ω 1S Boost Mode HW Pin Control

Figure 5-5 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 8Ω 2S Boost Mode

Figure 5-7 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 8Ω 2S Boost Mode HW Pin Control

Figure 5-9 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 8Ω External PVDD Mode

Figure 5-11 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 8Ω External PVDD Mode HW Pin Control

Figure 5-13 THD+N vs Output Power
TAS2120 THD+N vs Frequency

RL = 8Ω 1S Boost Mode

Figure 5-15 THD+N vs Frequency
TAS2120 THD+N vs Frequency

RL = 8Ω 2S Boost Mode

Figure 5-17 THD+N vs Frequency
TAS2120 THD+N vs Frequency

RL = 8Ω External PVDD Mode

Figure 5-19 THD+N vs Frequency
TAS2120 Efficiency vs Output Power

RL = 8Ω 1S Boost Mode

Figure 5-21 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 8Ω 1S Boost Mode HW Pin Control

Figure 5-23 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 8Ω 2S Boost Mode

Figure 5-25 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 8Ω 2S Boost Mode HW Pin Control

Figure 5-27 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 8Ω External PVDD Mode

Figure 5-29 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 8Ω External PVDD Mode HW Pin Control

Figure 5-31 Efficiency vs Output Power
TAS2120 Output Power vs 1S Battery voltage

RL = 8 Ω 1S Boost Mode

Figure 5-33 Output Power vs 1S Battery voltage
TAS2120 Output Power vs 2S Battery voltage

RL = 8 Ω 2S Boost Mode

Figure 5-35 Output Power vs 2S Battery voltage
TAS2120 Output Power vs PVDD Voltage

RL = 8 Ω External PVDD Mode

Figure 5-37 Output Power vs PVDD Voltage
TAS2120 Idle channel noise vs 1S Battery voltage

RL = 8 Ω 1S Boost Mode

Figure 5-39 Idle channel noise vs 1S Battery voltage
TAS2120 Idle channel noise vs PVDD voltage

RL = 8 Ω External PVDD Mode

Figure 5-41 Idle channel noise vs PVDD voltage
TAS2120 PSRR vs Frequency

RL = 8 Ω 1S Boost Mode

Figure 5-43 PSRR vs Frequency
TAS2120 Idle channel current vs VDD voltage

RL = 8 Ω

Figure 5-45 Idle channel current vs VDD voltage
TAS2120 Idle channel current vs VBAT voltage

RL = 8 Ω External PVDD Mode

Figure 5-47 Idle channel current vs VBAT voltage
TAS2120 THD+N vs Output Power

RL = 4Ω 1S Boost Mode

Figure 5-4 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 4Ω 1S Boost Mode HW Pin Control

Figure 5-6 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 4Ω 2S Boost Mode

Figure 5-8 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 4Ω 2S Boost Mode HW Pin Control

Figure 5-10 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 4Ω External PVDD Mode

Figure 5-12 THD+N vs Output Power
TAS2120 THD+N vs Output Power

RL = 4Ω External PVDD Mode HW Pin Control

Figure 5-14 THD+N vs Output Power
TAS2120 THD+N vs Frequency

RL = 4Ω 1S Boost Mode

Figure 5-16 THD+N vs Frequency
TAS2120 THD+N vs Frequency

RL = 4Ω 2S Boost Mode

Figure 5-18 THD+N vs Frequency
TAS2120 THD+N vs Frequency

RL = 4Ω External PVDD Mode

Figure 5-20 THD+N vs Frequency
TAS2120 Efficiency vs Output Power

RL = 4Ω 1S Boost Mode

Figure 5-22 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 4Ω 1S Boost Mode HW Pin Control

Figure 5-24 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 4Ω 2S Boost Mode

Figure 5-26 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 4Ω 2S Boost Mode HW Pin Control

Figure 5-28 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 4Ω External PVDD Mode

Figure 5-30 Efficiency vs Output Power
TAS2120 Efficiency vs Output Power

RL = 4Ω External PVDD Mode HW Pin Control

Figure 5-32 Efficiency vs Output Power
TAS2120 Output Power vs 1S Battery voltage

RL = 4 Ω 1S Boost Mode

Figure 5-34 Output Power vs 1S Battery voltage
TAS2120 Output Power vs 2S Battery voltage

RL = 4 Ω 2S Boost Mode

Figure 5-36 Output Power vs 2S Battery voltage
TAS2120 Output Power vs PVDD Voltage

RL = 4 Ω External PVDD Mode

Figure 5-38 Output Power vs PVDD Voltage
TAS2120 Idle channel noise vs 2S Battery voltage

RL = 8 Ω 1S Boost Mode

Figure 5-40 Idle channel noise vs 2S Battery voltage
TAS2120 Audio channel frequency response

RL = 8 Ω

Figure 5-42 Audio channel frequency response
TAS2120 PSRR vs Frequency

RL = 8 Ω External PVDD Mode

Figure 5-44 PSRR vs Frequency
TAS2120 Idle channel current vs VBAT voltage

RL = 8 Ω 1S Boost Mode

Figure 5-46 Idle channel current vs VBAT voltage
TAS2120 Idle channel current vs PVDD voltage

RL = 8 Ω External PVDD Mode

Figure 5-48 Idle channel current vs PVDD voltage