SLAU898A june   2023  – july 2023

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Setup
      1. 2.1.1 Electrostatic Discharge Caution
      2. 2.1.2 Power Configurations
      3. 2.1.3 Jumper Information
    2. 2.2 Hardware Description
      1. 2.2.1 Theory of Operation
        1. 2.2.1.1 Digital Interface
        2. 2.2.1.2 Analog
        3. 2.2.1.3 Proto Space
        4. 2.2.1.4 LED Biasing Sub Circuit
  9. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layout
    3. 3.3 Bill of Materials
  10. 4Additional Information
    1.     Trademarks
  11. 5Related Documentation from Texas Instruments

2.2.1 Theory of Operation

The reference Figure 3-1 shows a block diagram of DYI EVM. Plug in your smart DAC EVM into headers H1 and H2. The headers is pin compatible to all Smart DAC EVMs. Please note that not all pins on the header are utilized. If that is the case, then make sure that pin 1 on Smart DAC EVM connects to the closest to the edge of the board socket marked EVM Pin 1 of H1 header.

GUID-20230530-SS0I-GMC9-F48R-KPXKWB50NSWS-low.svg Figure 2-1 Hardware Block Diagram