SLDS187C October   2018  – June 2026 TPS65216

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Wake-Up and Power-Up and Power-Down Sequencing
        1. 6.3.1.1  Power-Up Sequencing
        2. 6.3.1.2  Power-Down Sequencing
        3. 6.3.1.3  Strobe 1 and Strobe 2
        4. 6.3.1.4  Supply Voltage Supervisor and Power-Good (PGOOD)
        5. 6.3.1.5  Internal LDO (INT_LDO)
        6. 6.3.1.6  Current Limited Load Switch
        7. 6.3.1.7  LDO1
        8. 6.3.1.8  UVLO
        9. 6.3.1.9  Power-Fail Comparator
        10. 6.3.1.10 DCDC3 and DCDC4 Power-Up Default Selection
        11. 6.3.1.11 I/O Configuration
          1. 6.3.1.11.1 Using GPIO2 as Reset Signal to DCDC1 and DCDC2
        12. 6.3.1.12 Push Button Input (PB)
          1. 6.3.1.12.1 Signaling PB-Low Event on the nWAKEUP Pin
          2. 6.3.1.12.2 Push Button Reset
        13. 6.3.1.13 AC_DET Input (AC_DET)
        14. 6.3.1.14 Interrupt Pin (INT)
        15. 6.3.1.15 I2C Bus Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Modes of Operation
      2. 6.4.2 OFF
      3. 6.4.3 ACTIVE
      4. 6.4.4 SUSPEND
      5. 6.4.5 RESET
  8. Register Maps
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Filter Design
        2. 8.2.2.2 Inductor Selection for Buck Converters
        3. 8.2.2.3 Output Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Package Option Addendum
      1. 11.1.1 Packaging Information
      2. 11.1.2 Tape and Reel Information

Overview

The TPS65216 provides three step-down converters three general-purpose I/Os, one buck-boost converter, one load switch, and one LDO. The system can be supplied by a regulated 5-V supply. The device is characterized across a –40°C to +105°C temperature range, which makes it suitable for various industrial applications.

The I2C interface provides comprehensive features for using TPS65216. All rails, the load switch, and GPIOs can be enabled and disabled. Voltage thresholds for the UVLO and supervisor can be customized. Power-up and power-down sequences can also be programmed through I2C. Interrupts for overtemperature, overcurrent, and undervoltage can be monitored for the load-switch.

The integrated voltage supervisor monitors DCDC 1-4 and LDO1. It has two settings; the standard settings only monitor for undervoltage, while the strict settings implement tight tolerances on both undervoltage and overvoltage. A power-good signal is provided to report the regulation state of the five rails.

The three hysteretic step-down converters can each supply up to 1.8 A of current. The default output voltages for each converter can be adjusted through the I2C interface. DCDC1 and DCDC2 features dynamic voltage scaling with an adjustable slew rate. The step-down converters operate in a low power mode at light load, and can be forced into power mode (PWM) operation for noise sensitive applications.