SLDU019B December   2015  – March 2016 PGA450-Q1

 

  1.   PGA450Q1EVM-S User's Guide and TIDA-00151 UART Demo Instructional
    1.     Trademarks
    2. 1 Introduction
    3. 2 Setup and Operation
      1. 2.1 Input and Output Connectors
      2. 2.2 Basic Operation
        1. 2.2.1 Programming the PGA450-Q1 DEVRAM or OTP Memory
        2. 2.2.2 Programming the PGA450-Q1 EEPROM
        3. 2.2.3 Testing the UART Connection With the TI GER Board
      3. 2.3 UART Command Listing
    4. 3 Software
      1. 3.1 IDE Output File Configuration
        1. 3.1.1 Setup for DEVRAM Output File
        2. 3.1.2 Setup for OTP Output File
      2. 3.2 Interface Descriptions
        1. 3.2.1 UART Interface
        2. 3.2.2 LIN Interface
        3. 3.2.3 Serial-Peripheral Interface
    5. 4 Schematic, Bill of Materials, and Layout
      1. 4.1 Schematic
      2. 4.2 Bill of Materials
        1. 4.2.1 BOM
      3. 4.3 Board Layout and Component Placement
    6. 5 References
  2.   Revision History

2.1 Input and Output Connectors

The PGA450Q1EVM-S has two power connectors, three communication interfaces, and two outputs. Table 1 lists the connectors in addition to a function description which includes the electrical specifications.

Table 1. Terminal Descriptors

Terminal Designator Direction Description
MAIN J2-1 Input Single-system power supply to the VPWR pin of the PGA450-Q1 device. This supply is rated at 7 to 18 V DC for powering the entire board.
LIN J2-2 Input/Output The PGA450-Q1 device implements the LIN 2.1 compliant physical layer. This physical layer can be used to communicate data between the PGA450-Q1 device and the master MCU.
GND J2-3, J4-2 — Ground terminal to complete the circuit.
VPROG J2-4 Input VPROG_OTP power supply input of 8 V for programming OTP memory of the PGA450-Q1 device.
SPI J3 Input/Output SPI is the communication that is required for use with the PGA450Q1EVM GUI and TI GER USB interface for programming the PGA450-Q1 device(1). The internal 8051W must be placed in reset to communicate using SPI.
UART J4-3, J4-4 Input/Output The TxD and RxD pins on the PGA450-Q1 device are connected to the 8051W UART. These two pins can be used either for software debugging or for implementing application-specific protocols.
DACO J4-1 Output Observe the echo signal as an amplified analog signal or from a DAC output which converts a digitally filtered echo signal. In the Evaluation tab of the GUI, the quick-access buttons, Amplifier Output (unfiltered) and Datapath Output (filtered), are available. The signal is viewable on the DACO pin. Only one mode can be selected at a time.
XDCR Connector J1 Input/Output The transducer (XDCR) connector is used to drive and listen for ultrasonic signals with an external transducer sensor element.
(1) The TI GER (Texas Instruments general equipment resource) USB interface board is included with the purchase of the PGA450Q1EVM, and cannot be purchased separately. Purchase the PGA450Q1EVM or develop a custom USB interface tool to program or evaluate the PGA450-Q1 device on the PGA450Q1EVM-S platform.