SLFS047C February   1984  – December 2024 TLC556 , TLC556M

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: VDD = 2V for TLC556C, VDD = 3V for TLC556I
    6. 5.6 Electrical Characteristics: VDD = 5V
    7. 5.7 Electrical Characteristics: VDD = 15V
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram (Each Timer)
    3. 6.3 Feature Description
      1. 6.3.1 Monostable Operation
      2. 6.3.2 Astable Operation
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Designing for Improved ESD Performance
    2. 7.2 Typical Applications
      1. 7.2.1 Pulse-Width Modulation
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Pulse-Position Modulation
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.4 Thermal Information

THERMAL METRIC(1) TLC556 UNIT
D
(SOIC)		 FK
(LCCC)		 J
(CDIP)		 N
(PDIP)
14 PINS 20 PINS 14 PINS 14 PINS
R θJA Junction-to-ambient thermal resistance 94.1 63.8 80.6 75.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 54.3 39.1 33.5 54.1 °C/W
R θJB Junction-to-board thermal resistance 52.2 38.5 68.2 50.0 °C/W
ψ JT Junction-to-top characterization parameter 14.1 33.3 26.9 31.8 °C/W
ψ JB Junction-to-board characterization parameter 51.6 38.3 63.2 49.4 °C/W
R θJC(bot) Junction-to-case (bottom) thermal resistance N/A 4.7 15.2 N/A °C/W
(1) For information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report.