SLIS032D July   1995  – April 2025 TPIC6B595

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Serial-In Interface
      2. 7.3.2 Clear Register
      3. 7.3.3 Output Control
      4. 7.3.4 Cascaded Application
      5. 7.3.5 Current Limit Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With V(VCC) < 4.5 (Minimum V(VCC))
      2. 7.4.2 Operating With 5.5 V < V(VCC) < 6 V
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Support Resources
    2. 9.2 Trademarks
    3. 9.3 Electrostatic Discharge Caution
    4. 9.4 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.7 Typical Characteristics

TPIC6B595 Peak Avalanche Current vs Time Duration of Avalanche
Figure 5-1 Peak Avalanche Current vs Time Duration of Avalanche
TPIC6B595 Drain-to-Source On-State Resistance vs Drain Current
Technique should limit TJ − TC to 10°C maximum.
Figure 5-3 Drain-to-Source On-State Resistance vs Drain Current
TPIC6B595 Switching Time vs Case Temperature
Technique should limit TJ − TC to 10°C maximum
Figure 5-5 Switching Time vs Case Temperature
TPIC6B595 Maximum Peak Drain Current of Each Output vs Number of Outputs Conducting Simultaneously
Figure 5-7 Maximum Peak Drain Current of Each Output vs Number of Outputs Conducting Simultaneously
TPIC6B595 Supply Current vs Frequency
Figure 5-2 Supply Current vs Frequency
TPIC6B595 Static Drain-to-Source On-State Resistance vs Logic Supply Voltage
Technique should limit TJ − TC to 10°C maximum.
Figure 5-4 Static Drain-to-Source On-State Resistance vs Logic Supply Voltage
TPIC6B595 Maximum Continuous Drain Current of Each Output vs Number of Outputs Conducting Simultaneously
Figure 5-6 Maximum Continuous Drain Current of Each Output vs Number of Outputs Conducting Simultaneously