The TPIC6B595 device is a monolithic, high-voltage, medium-current power 8-bit shift register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium current or high-voltage loads.
This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively.
The storage register transfers data to the output buffer when shift-register clear (SRCLR) is high. When SRCLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) allows for cascading of the data from the shift register to additional devices.
Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous sink-current capability. Each output provides a 500-mA typical current limit at TC = 25°C. The current limit decreases as the junction temperature increases for additional device protection.
The TPIC6B595 is characterized for operation over the operating case temperature range of −40°C to 125°C.
For all available packages, see the orderable addendum at the end of the data sheet.| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | TPIC6B595 Power Logic 8-Bit Shift Register datasheet (Rev. B) | PDF | HTML | 19 Jun 2015 |
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| Package | Pins | Download |
|---|---|---|
| PDIP (N) | 20 | View options |
| SOIC (DW) | 20 | View options |
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