SLIS094B March   2000  – March 2025 TPIC6A596

PRODUCTION DATA  

  1.   1
  2. Features
  3. Application
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Dissipation Rating Table
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
    6. 5.6 Thermal Resistance
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Serial-In Interface
      2. 7.3.2 Clear Register
      3. 7.3.3 Output Control
      4. 7.3.4 Cascaded Application
      5. 7.3.5 Current Limit Function
  9. Device Functional Modes
    1. 8.1 Operating with Vcc < 4.5V
    2. 8.2 Operating with 5.5V < Vcc ≤ 7V
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Switching Characteristics

VCC = 5 V, TC = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPHL Propagation delay time, high-to-low-level output from G

CL = 30pF,

See Figure 6-1, Figure 6-2 and Figure 5-6

ID = 350mA, 30 ns
tPLH Propagation delay time, low-to-high-level output from G 125 ns
tr Rise time, drain output 60 ns
tf Fall time, drain output 30 ns
tpd Propagation delay time, SRCK↓ to SEROUT

CL = 30pF,

See Figure 6-2

ID = 350mA, 20 ns
f(SRCK) Serial clock frequency

CL = 30pF,

See(3)

ID = 350mA, 10 MHz
ta Reverse-recovery-current rise time

IF = 350mA,

See Figure 6-5(1)(2)

di/dt = 20A/µs, 100 ns
trr Reverse-recovery time 300 ns
Technique should limit TJ − TC to 10°C maximum.
These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
This is the maximum serial clock frequency assuming cascaded operation where serial data is passed from one stage to a second stage. The clock period allows for SRCK ® SEROUT propagation delay and setup time plus some timing margin.