SLLS682P
July 2006 – January 2025
TPD4E001
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
Pin Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings—JEDEC Specification
5.3
ESD Ratings—IEC Specification
5.4
Recommended Operating Conditions
5.5
Thermal Information
5.6
Electrical Characteristics
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.3
Application Curve
Power Supply Recommendations
8
Layout
8.1
Layout Guidelines
8.2
Layout Example
9
Device and Documentation Support
9.1
Third-Party Products Disclaimer
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
1
Features
IEC 61000-4-2 ESD Protection (Level 4)
±8kV Contact Discharge
±15kV Air-Gap Discharge
5.5A Peak Pulse Current (8/20µs Pulse)
IO Capacitance: 1.5pF (Typical)
Low Leakage Current: 1nA (Maximum)
Low Supply Current: 1nA
0.9V to 5.5V Supply-Voltage Range
Space-Saving DRL, DBV, DCK, DPK, and DRS Package Options
Alternate 2, 3, 6-Channel options Available: TPD2E001, TPD3E001, TPD6E001