SLLSEH3D July   2013  – September 2025 SN65HVD888

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings: JEDEC Specifications
    3. 5.3 ESD Ratings: IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Power Dissipation Characteristics
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. Parameter Measurement information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low-Power Standby Mode
      2. 7.3.2 Bus Polarity Correction
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Device Configuration
      2. 8.1.2 Bus Design
      3. 8.1.3 Cable Length Versus Data Rate
      4. 8.1.4 Stub Length
      5. 8.1.5 3 to 5V Interface
      6. 8.1.6 Noise Immunity
      7. 8.1.7 Transient Protection
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Design and Layout Considerations For Transient Protection
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Transient Protection

The bus terminals of the SN65HVD888 transceiver family possess on-chip ESD protection against ±16kV HBM and ±12kV IEC61000-4-2 contact discharge. The International Electrotechnical Commision (IEC) ESD test is far more severe than the HBM ESD test. The 50% higher charge capacitance, CS, and 78% lower discharge resistance, RD of the IEC model produce significantly higher discharge currents than the HBM model.

As stated in the IEC 61000-4-2 standard, contact discharge is the preferred transient protection test method. Although IEC air-gap testing is less repeatable than contact testing, air discharge protection levels are inferred from the contact discharge test results.

SN65HVD888 HBM and IEC-ESD Models and Currents in Comparison (HBM Values in Parenthesis)Figure 8-5 HBM and IEC-ESD Models and Currents in Comparison (HBM Values in Parenthesis)

The on-chip implementation of IEC ESD protection significantly increases the robustness of equipment. Common discharge events occur because of human contact with connectors and cables. Designers may choose to implement protection against longer duration transients, typically referred to as surge transients. Figure 6-9 suggests two circuit designs providing protection against short and long duration surge transients, in addition to ESD and Electrical Fast Transients (EFT) transients. Table 8-2 lists the bill of materials for the external protection devices.

EFTs are generally caused by relay-contact bounce or the interruption of inductive loads. Surge transients often result from lightning strikes (direct strike or an indirect strike which induce voltages and currents), or the switching of power systems, including load changes and short circuits switching. These transients are often encountered in industrial environments, such as factory automation and power-grid systems.

Figure 8-6 compares the pulse-power of the EFT and surge transients with the power caused by an IEC ESD transient. In the diagram on the left of Figure 8-6, the tiny blue blip in the bottom left corner represents the power of a 10kV ESD transient, which already dwarfs against the significantly higher EFT power spike, and certainly dwarfs against the 500V surge transient. This type of transient power is well representative of factory environments in industrial and process automation. The diagram on the fright of Figure 8-6 compares the enormous power of a 6kV surge transient, most likely occurring in e-metering applications of power generating and power grid systems, with the aforementioned 500V surge transient.

Note:

The unit of the pulse-power changes from kW to MW, thus making the power of the 500V surge transient almost dropping off the scale.

SN65HVD888 Power Comparison of ESD, EFT, and Surge TransientsFigure 8-6 Power Comparison of ESD, EFT, and Surge Transients

In the case of surge transients, high-energy content is signified by long pulse duration and slow decaying pulse power

The electrical energy of a transient that is dumped into the internal protection cells of the transceiver is converted into thermal energy. This thermal energy heats the protection cells and literally destroys them, thus destroying the transceiver. Figure 8-7 shows the large differences in transient energies for single ESD, EFT, and surge transients as well as for an EFT pulse train, commonly applied during compliance testing.

SN65HVD888 Comparison of Transient EnergiesFigure 8-7 Comparison of Transient Energies
Table 8-2 Bill of Materials
DEVICE FUNCTION ORDER NUMBER MANUFACTURER
XCVR 5V, 250kbps RS-485 Transceiver SN65HVD888 TI
R1, R2 10Ω, Pulse-Proof Thick-Film Resistor CRCW0603010RJNEAHP Vishay
TVS Bidirectional 400W Transient Suppressor CDSOT23-SM712 Bourns
TBU1, TBU2 Bidirectional. TBU-CA-065-200-WH Bourns
MOV1, MOV2 200mA Transient Blocking Unit 200V, Metal-Oxide Varistor MOV-10D201K Bourns
  1. See the Third-Party Products Disclaimer .
SN65HVD888 Transient Protections Against ESD, EFT, and Surge TransientsFigure 8-8 Transient Protections Against ESD, EFT, and Surge Transients

The left circuit shown in Figure 8-8 provides surge protection of ≥ 500V transients, while the right protection circuits can withstand surge transients of 5kV.