SLLSEO5D October   2015  – March 2021 TUSB322I

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
  6. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Cables, Adapters, and Direct Connect Devices
        1. 6.3.1.1 USB Type-C Receptacles and Plugs
        2. 6.3.1.2 USB Type-C Cables
        3. 6.3.1.3 Legacy Cables and Adapters
        4. 6.3.1.4 Direct Connect Devices
        5. 6.3.1.5 Audio Adapters
      2. 6.3.2 Port Role Configuration
        1. 6.3.2.1 Downstream Facing Port (DFP) - Source
        2. 6.3.2.2 Upstream Facing Port (UFP) - Sink
        3. 6.3.2.3 Dual Role Port (DRP)
      3. 6.3.3 Type-C Current Mode
      4. 6.3.4 Accessory Support
        1. 6.3.4.1 Audio Accessory
        2. 6.3.4.2 Debug Accessory
      5. 6.3.5 I2C and GPIO Control
      6. 6.3.6 VBUS Detection
      7. 6.3.7 Cable Orientation and External MUX Control
      8. 6.3.8 VCONN Support for Active Cables
    4. 6.4 Device Functional Modes
      1. 6.4.1 Unattached Mode
      2. 6.4.2 Active Mode
      3. 6.4.3 Shutdown Mode
      4. 6.4.4 Dead Battery Mode
    5. 6.5 Programming
    6. 6.6 Register Maps
      1. 6.6.1 CSR Registers
        1. 6.6.1.1 Device Identification Register (offset = 0x07 through 0x00) [reset = 0x00, 0x54, 0x55, 0x53, 0x42, 0x33, 0x32, 0x32]
        2. 6.6.1.2 Connection Status Register (offset = 0x08) [reset = 0x00]
        3. 6.6.1.3 Connection Status and Control Register (offset = 0x09) [reset = 0x20]
        4. 6.6.1.4 General Control Register (offset = 0x0A) [reset = 0x00]
        5. 6.6.1.5 Device Revision Register (offset = 0xA0) [reset = 0x02]
  7. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 DRP in I2C Mode
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 DFP in I2C Mode
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
      3. 7.2.3 UFP in I2C Mode
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curves
    3. 7.3 Initialization Set Up
  8. 8 Layout
    1. 8.1 Layout Guidelines
    2. 8.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Community Resources
    4. 9.4 Trademarks
  10. 10Mechanical, Packaging, and Orderable Information

7.2.1.2 Detailed Design Procedure

The TUSB322I device supports a VDD in the range of 4.5 V to 5.5 V. In this particular use case, 5 V is connected to the VDD pin. Because VCONN support is required for a DRP, the 5 V on VDD meets the USB Type-C VCONN requirement of 4.75 V to 5.5 V. A 100-nF capacitor is placed near VDD. Also, a 100-µF capacitor is used to meet the USB Type-C bulk capacitance requirement of 10 µF to 220 µF.

The TUSB322I device is placed into I2C mode by either pulling the ADDR pin high or low. In this case, the ADDR pin is tied to GND which results in a I2C address of 0x47. The SDA and SCL must be pulled up to either 1.8 V or 3.3 V. When pulled up to 3.3 V, the VDD supply must be at least 3 V to keep from back-driving the I2C interface.

The INT_N/OUT3 pin is used to notify the PMIC when a change in the TUSB322I I2C registers occurs. This pin is an open drain output and requires an external pullup resistor. The pin should be pulled up to VDD using a 200-kΩ resistor.

The ID pin is used to indicate when a connection has occurred if the TUSB322I device is a DFP while configured for DRP. An OTG USB controller can use this pin to determine when to operate as a USB Host or USB Device. When this pin is driven low, the OTG USB controller functions as a host and then enables VBUS. The Type-C standard requires that a DFP not enable VBUS until the VBUS is in the Attached.SRC state. If the ID pin is not low but VBUS is detected, then the OTG USB controller functions as a device. The ID pin is open drain output and requires an external pullup resistor. The ID pin should be pulled up to VDD using a 200-kΩ resistor.

The DIR pin is used to control the mux for connecting the USB3 SS signals to the appropriate pins on the USB Type-C receptacle. In this particular case, a HD3SS3212 is used as the mux. To minimize crossing in routing the USB3 SS signals to the USB Type C connector, the connection of CC1 and CC2 to the TUSB322I is swapped. When swapping the CC1 and CC2 connection, the CABLE_DIR register will also be reversed (0 = CC2 and 1 = CC1).

The VBUS_DET pin must be connected through a 900-kΩ resistor to VBUS on the Type-C that is connected. This large resistor is required to protect the TUSB322I device from large VBUS voltage that is possible in present day systems. This resistor along with internal pulldown keeps the voltage observed by the TUSB322I device in the recommended range.

The USB2 specification requires the bulk capacitance on VBUS based on UFP or DFP. When operating the TUSB322I device in a DRP mode, it alternates between UFP and DFP. If the TUSB322I device connects as a UFP, the large bulk capacitance must be removed.

Table 7-2 USB2 Bulk Capacitance Requirements
PORT CONFIGURATIONMINMAXUNIT
Downstream facing port (DFP)120µF
Upstream facing port (UFP)110µF