SLLSEO5D October   2015  – March 2021 TUSB322I

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
  6. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Cables, Adapters, and Direct Connect Devices
        1. 6.3.1.1 USB Type-C Receptacles and Plugs
        2. 6.3.1.2 USB Type-C Cables
        3. 6.3.1.3 Legacy Cables and Adapters
        4. 6.3.1.4 Direct Connect Devices
        5. 6.3.1.5 Audio Adapters
      2. 6.3.2 Port Role Configuration
        1. 6.3.2.1 Downstream Facing Port (DFP) - Source
        2. 6.3.2.2 Upstream Facing Port (UFP) - Sink
        3. 6.3.2.3 Dual Role Port (DRP)
      3. 6.3.3 Type-C Current Mode
      4. 6.3.4 Accessory Support
        1. 6.3.4.1 Audio Accessory
        2. 6.3.4.2 Debug Accessory
      5. 6.3.5 I2C and GPIO Control
      6. 6.3.6 VBUS Detection
      7. 6.3.7 Cable Orientation and External MUX Control
      8. 6.3.8 VCONN Support for Active Cables
    4. 6.4 Device Functional Modes
      1. 6.4.1 Unattached Mode
      2. 6.4.2 Active Mode
      3. 6.4.3 Shutdown Mode
      4. 6.4.4 Dead Battery Mode
    5. 6.5 Programming
    6. 6.6 Register Maps
      1. 6.6.1 CSR Registers
        1. 6.6.1.1 Device Identification Register (offset = 0x07 through 0x00) [reset = 0x00, 0x54, 0x55, 0x53, 0x42, 0x33, 0x32, 0x32]
        2. 6.6.1.2 Connection Status Register (offset = 0x08) [reset = 0x00]
        3. 6.6.1.3 Connection Status and Control Register (offset = 0x09) [reset = 0x20]
        4. 6.6.1.4 General Control Register (offset = 0x0A) [reset = 0x00]
        5. 6.6.1.5 Device Revision Register (offset = 0xA0) [reset = 0x02]
  7. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 DRP in I2C Mode
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 DFP in I2C Mode
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
      3. 7.2.3 UFP in I2C Mode
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curves
    3. 7.3 Initialization Set Up
  8. 8 Layout
    1. 8.1 Layout Guidelines
    2. 8.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Community Resources
    4. 9.4 Trademarks
  10. 10Mechanical, Packaging, and Orderable Information

6.6.1.4 General Control Register (offset = 0x0A) [reset = 0x00]

Figure 6-5 General Control Register
76543210
DEBOUNCEMODE_SELECTI2C_SOFT_RESETSOURCE_PREFDISABLE_TERM
RWRWRSURWRW
LEGEND: R/W = Read/Write; R/S/U = Read/Set/Update
Table 6-10 General Control Register Field Descriptions
BitFieldTypeResetDescription
7-6DEBOUNCERW2'b00

The nominal amount of time the TUSB322I device debounces the voltages on the CC pins.

00 – 168ms (default)

01 – 118ms

10 – 134ms

11 – 152ms

5-4MODE_SELECTRW2'b00

This register can be written to set the TUSB322I device mode operation. The ADDR pin must be set to I2C mode.

00 – DRP mode (start from unattached.SNK) (default)

01 – UFP mode (unattached.SNK)

10 – DFP mode(unattached.SRC)

11 – DRP mode(start from unattached.SNK)

3I2C_SOFT_RESETRSU1'b0

This register resets the digital logic. The bit is self-clearing. A write of 1 starts the reset. The following registers can be affected after setting this bit:

CURRENT_MODE_DETECT

ACTIVE_CABLE_DETECTION

ACCESSORY_CONNECTED

ATTACHED_STATE

CABLE_DIR

2-1SOURCE_PREFRW2'b00

This field controls the TUSB322I behavior when configured as a DRP.

00 – Standard DRP (default)

01 – DRP will perform Try.SNK

10 – Reserved

11 – DRP will perform Try.SRC

0DISABLE_TERMRW1'b0

This field will disable the termination on CC pins and transition the CC state machine to the disabled state.

0 – Termination enabled according TUSB322I mode of operation (default)

1 – Termination disabled and state machine held in disable state.