SLLSF83B May   2021  – July 2025 TCAN11623-Q1 , TCAN11625-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configurations and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings IEC Specification
    4. 5.4 Recomended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Power Supply Characteristics
    7. 5.7 Electrical Characteristics
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VSUP Pin
      2. 7.3.2  VCCOUT Pin
      3. 7.3.3  VFLT Pin
      4. 7.3.4  VLDO3 Pin
      5. 7.3.5  Digital Inputs and Outputs
      6. 7.3.6  Digital Control and Timing
      7. 7.3.7  VIO Pin
      8. 7.3.8  GND
      9. 7.3.9  INH Pin
      10. 7.3.10 WAKE Pin
      11. 7.3.11 nRST Pin
      12. 7.3.12 CAN Bus Pins
      13. 7.3.13 Local Faults
        1. 7.3.13.1 TXD Dominant Timeout (TXD DTO)
        2. 7.3.13.2 Thermal Shutdown (TSD)
        3. 7.3.13.3 Under/Over Voltage Lockout
        4. 7.3.13.4 Unpowered Devices
        5. 7.3.13.5 Floating Terminals
        6. 7.3.13.6 CAN Bus Short Circuit Current Limiting
        7. 7.3.13.7 Sleep Wake Error Timer
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Mode Description
        1. 7.4.1.1 Normal Mode
        2. 7.4.1.2 Standby Mode
        3. 7.4.1.3 Sleep Mode
          1. 7.4.1.3.1 Remote Wake Request via Wake-Up Pattern (WUP)
          2. 7.4.1.3.2 Local Wake-Up (LWU) via WAKE Input Terminal
        4. 7.4.1.4 Reset Mode
        5. 7.4.1.5 Fail-safe Mode
      2. 7.4.2 CAN Transceiver
        1. 7.4.2.1 CAN Transceiver Operation
        2. 7.4.2.2 CAN Transceiver Modes
          1. 7.4.2.2.1 CAN Off Mode
          2. 7.4.2.2.2 CAN Autonomous: Inactive and Active
          3. 7.4.2.2.3 CAN Active
        3. 7.4.2.3 Driver and Receiver Function Tables
        4. 7.4.2.4 CAN Bus States
  9. 8 Application Information
    1. 8.1 Application Information Disclaimer
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Bus Loading, Length and Number of Nodes
      2. 8.2.2 Detailed Design Procedures
        1. 8.2.2.1 CAN Termination
    3. 8.3 Application Curves
    4. 8.4 Power Supply Requirements
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.11 nRST Pin

The nRST is a bidirectional open drain low side driver with an integrated pull-up resistor to VCCOUT (TCAN11625-Q1) or VLDO3 (TCAN11623-Q1). It can be pulled low by the device when placed in fail-safe mode.

During initial power-up of the device, a sleep mode to reset transition, a fail-safe mode to reset transition, or an undervoltage event will be recognized as a cold crank reset condition. The nRST pin will be held low for tnRST(cold) allowing the MCU and peripheral devices to power-up correctly before data transmission begins.

To enter reset mode from normal mode, or standby mode the nRST must be pulled low for a minimum of time of tnRST. The TCAN1162x-Q1 recognizes this as a warm crank reset condition and holds the nRST pin low for tnRST(warm).

TCAN11623-Q1 TCAN11625-Q1 nRST Circuit Figure 7-3 nRST Circuit