SLLSFT3B November   2025  – November 2026 MC121-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Timing Requirements
    7. 5.7 Timing Diagrams
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Motor Control
        1. 6.3.1.1 Duty Input
        2. 6.3.1.2 Duty Curve
        3. 6.3.1.3 Motor Start, Speed Change, and Stop
        4. 6.3.1.4 Open-Loop (Duty Cycle) Control
        5. 6.3.1.5 Closed-Loop (Speed) Control
        6. 6.3.1.6 Commutation
          1. 6.3.1.6.1 Hall Sensor
            1. 6.3.1.6.1.1 Field Direction Definition
            2. 6.3.1.6.1.2 Internal Hall Latch Sensor Output
          2. 6.3.1.6.2 Hall Offset
          3. 6.3.1.6.3 Square Commutation
          4. 6.3.1.6.4 Soft Commutation
        7. 6.3.1.7 PWM Modulation Modes
      2. 6.3.2 Protections
        1. 6.3.2.1 Locked Rotor Protection
        2. 6.3.2.2 Current Limit
        3. 6.3.2.3 Overcurrent Protection (OCP)
        4. 6.3.2.4 VM Undervoltage Lockout (UVLO)
        5. 6.3.2.5 VM Over Voltage Protection (OVP)
        6. 6.3.2.6 Thermal Shutdown (TSD)
        7. 6.3.2.7 Integrated Supply (VM) Clamp
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Sleep and Standby Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Test Mode and One-Time Programmable Memory
    5. 6.5 Programming
      1. 6.5.1 I2C Communication
        1. 6.5.1.1 I2C Read
        2. 6.5.1.2 I2C Write
  8. 7 Register Map
    1. 7.1 USR_OTP Registers
    2. 7.2 USR_TM Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Components
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Bulk Capacitance
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
    5. 8.5 Hall Element Position
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.4.2 Sleep and Standby Mode

The MC121-Q1 features a low power sleep mode and can be enabled by configuring SLEEP_EN = 0x1. In sleep mode (SLEEP_EN = 0x1 and DIN = 0%), the device draws very low quiescent current from the VM pin (IVMQ) by disabling internal circuitry including FETs, hall sensor, current sense, digital core, internal regulators, and charge pump. The device wakes up and enters active (STBY_EN = 0x0) or standby (STBY_EN = 0x1) mode, when DIN > 0% for tWAKE when in PWM input mode (PWMDC_MODE = 0x0). In analog input mode (PWMDC_MODE = 0x1), to wake up the device from sleep, the voltage at PWM/DC pin must be greater than VIH for tWAKE.

When sleep mode is disabled (SLEEP = 0x0), STBY_EN decides the device operation across DIN < DIN0. When DIN < DIN0 and STBY_EN = 0x0, MC121-Q1 drives the motor at duty or speed corresponding to DOUT0. When DIN < DIN0 and STBY_EN = 0x1, MC121-Q1 stops the motor operation (DOUT = 0%) and is in standby state.

Irrespective of SLEEP_EN and STBY_EN values, when DIN_OFF > DIN ≥ (DIN0 + DIN_HYS), MC121-Q1 drives the motor at duty or speed set by the duty curve. Table 6-5 summarizes the MC121-Q1 operation during the sleep and standby mode.

Note: DIN = 0% corresponds to duty cycle of 0% in PWM input mode (PWMDC_MODE = 0x0) and a DC voltage < VDC_0% in DC (analog) input mode (PWMDC_MODE = 0x1).
Table 6-5 Summary of sleep/standby mode operation
SLEEP_EN STBY_EN Condition for Device Status Change Device Status DOUT H-Bridge State
0x0 0x0 DIN < DIN0 Active Mode DOUT0 PWM
0x1 Standby Mode 0% Hi-Z
X X DIN_OFF > DIN ≥ (DIN0 + DIN_HYS) Active Mode Set by DIN as per duty curve PWM
0x1 X DIN = 0%; refer Figure 6-8 Sleep Mode 0% Hi-Z
0x1 0x0 0% < DIN < DIN0 Active Mode DOUT0 PWM
0x1 Standby Mode 0% Hi-Z