SLLSFT3B November   2025  – November 2026 MC121-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Timing Requirements
    7. 5.7 Timing Diagrams
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Motor Control
        1. 6.3.1.1 Duty Input
        2. 6.3.1.2 Duty Curve
        3. 6.3.1.3 Motor Start, Speed Change, and Stop
        4. 6.3.1.4 Open-Loop (Duty Cycle) Control
        5. 6.3.1.5 Closed-Loop (Speed) Control
        6. 6.3.1.6 Commutation
          1. 6.3.1.6.1 Hall Sensor
            1. 6.3.1.6.1.1 Field Direction Definition
            2. 6.3.1.6.1.2 Internal Hall Latch Sensor Output
          2. 6.3.1.6.2 Hall Offset
          3. 6.3.1.6.3 Square Commutation
          4. 6.3.1.6.4 Soft Commutation
        7. 6.3.1.7 PWM Modulation Modes
      2. 6.3.2 Protections
        1. 6.3.2.1 Locked Rotor Protection
        2. 6.3.2.2 Current Limit
        3. 6.3.2.3 Overcurrent Protection (OCP)
        4. 6.3.2.4 VM Undervoltage Lockout (UVLO)
        5. 6.3.2.5 VM Over Voltage Protection (OVP)
        6. 6.3.2.6 Thermal Shutdown (TSD)
        7. 6.3.2.7 Integrated Supply (VM) Clamp
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Sleep and Standby Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Test Mode and One-Time Programmable Memory
    5. 6.5 Programming
      1. 6.5.1 I2C Communication
        1. 6.5.1.1 I2C Read
        2. 6.5.1.2 I2C Write
  8. 7 Register Map
    1. 7.1 USR_OTP Registers
    2. 7.2 USR_TM Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Components
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Bulk Capacitance
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
    5. 8.5 Hall Element Position
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.3.1.3 Motor Start, Speed Change, and Stop

Motor Start

The MC121-Q1 features a user configured ramp to reach the target output duty cycle (DOUT_TARGET in Figure 6-2) during motor start-up as shown in Figure 6-6. The two stage ramp (pre-start followed by soft start) enables a reliable start-up and reduces motor noise.

The MC121-Q1 enters the pre-start phase when the device exits standby mode, sleep mode, or fault mode. When PRESTART_RAMP_EN is set to 0x1, the output duty cycle (DOUT in Figure 6-2) increases linearly from starting duty cycle (DOUT_START x DOUT_MAX when speed loop is disabled and DOUT_START when speed loop is enabled) at the rate set by PWM_RAMP_SEL. When PRESTART_RAMP_EN is set to 0x0, then DOUT is updated directly by the DOUT_TARGET. The pre-start phase continues till 16 to 32 hall edges are observed.

After pre-start phase when PWM_RAMP_EN is set to 0x1, the output duty cycle (DOUT) increases linearly to ramp up DOUT to DOUT_TARGET at the rate set by the PWM_RAMP_SEL. If DOUT has already reached DOUT_TARGET by the end of pre-start phase, the device enters steady state directly. The soft start phase ends when DOUT reaches output duty or speed target. When PWM_RAMP_EN is set to 0x0, then DOUT is updated directly by the DOUT_TARGET after pre-start phase.

During the pre-start phase, the MC121-Q1 always uses square commutation to drive the motor. The MC121-Q1 do not apply hall offset (angle and time offset) during the pre-start phase. A demagnetization time (set by DEMAG_TIME configuration) is applied during the pre-start phase to minimize the DC bus voltage spikes at startup. In the soft-start phase, both hall offset and demagnetization time (set by AUTO_DEMAG_EN configuration) are applied and MC121-Q1 uses the commutation scheme set by the COMMUTATION_MODE.

If the MC121-Q1 does not detect a Hall signal transition within the locked rotor detection time tLRD, the device enters the locked rotor protection fault state. During start-up sequence, locked rotor detection time (tLRD_START) is user configured by LRD_TIME_STARTUP. During motor run, locked rotor detection time (tLRD_RUN) is fixed at 320ms. Hall offset (angle and time) is disabled during the pre-start phase.

MC121-Q1 Output duty cycle during motor start Figure 6-6 Output duty cycle during motor start
Speed Change

During motor operation, when DIN changes, the MC121-Q1 ramps the output duty cycle (DOUT in Figure 6-2) from previous target duty cycle (DOUT_TARGET_PREV) to the new target duty cycle (DOUT_TARGET) using user configured ramp rate. During acceleration (DOUT_TARGET > DOUT_TARGET_PREV), the ramp rate is set by PWM_RAMP_SEL and during deceleration (DOUT_TARGET < DOUT_TARGET_PREV), the ramp rate is either PWM_RAMP_SEL (when PWM_DECEL_SEL = 0x0) or 0.5x PWM_RAMP_SEL (when PWM_DECEL_SEL = 0x1). PWM_DECEL_SEL = 0x1 provides a slower ramp during deceleration to avoid DC bus spikes due to regenerative energy push-back from motor. Figure 6-7 shows examples of DOUT increasing and decreasing according to PWM_RAMP_SEL.

MC121-Q1 Duty Cycle Ramp Figure 6-7 Duty Cycle Ramp
Motor Stop

When a motor stop (DOUT_TARGET = 0%) is received, MC121-Q1 stops the motor based on RAMP_ON_STOP_DIS setting. When RAMP_ON_STOP_DIS is set to 0x1, all FETs are placed in Hi-Z on detecting motor stop (within tSTOP_DET). When RAMP_ON_STOP_DIS is set to 0x0, the device ramps down DOUT (at the rate set by PWM_DECEL_SEL) to zero followed by Hi-Z of all FETs. Once the FETs are in Hi-Z, depending on the STBY_EN and SLEEP_EN configuration, MC121-Q1 continues in active, standby, or enters low-power sleep state. The motor stop sequence when DOUT_TARGET is set to 0% is shown in Figure 6-8.

MC121-Q1 Motor stop Sequence when DOUT_TARGET = 0% Figure 6-8 Motor stop Sequence when DOUT_TARGET = 0%
Note:

Setting the PWM_RAMP_EN bit to 0x0 disables the duty cycle ramp. Disabling the duty cycle ramp results in a step change in the DOUT (when DIN changes), that can result in high motor phase currents or DC bus voltage spikes. TI recommends setting PWM_RAMP_EN to 0x1 to avoid any current or voltage spikes.