SLOS193D February 1997 – March 2026 TLE2061 , TLE2061A , TLE2061AM , TLE2061BM , TLE2061M , TLE2061M-D , TLE2062 , TLE2062A , TLE2062AM , TLE2062AM-D , TLE2062BM , TLE2062M , TLE2064 , TLE2064A , TLE2064AM , TLE2064AM-D , TLE2064BM , TLE2064M , TLE2064M-D
PRODUCTION DATA
Figure 5-1 TLE2061 Distribution of
Input Offset Voltage
Figure 5-3 TLE2064 Distribution of
Input Offset Voltage
Figure 5-5 Input Bias Current and
Input Offset Current vs Free-Air Temperature
Figure 5-7 Maximum Negative Peak
Output Voltage vs Output Current
Figure 5-9 Voltage Follower Large
Signal Pulse Response
Figure 5-11 Noise Voltage
Figure 5-13 Total Harmonic Distortion
vs Frequency
Figure 5-15 Phase Margin vs Supply
Voltage
| CL = 20pF |
Figure 5-2 TLE2062 Distribution of
Input Offset Voltage
Figure 5-4 Input Bias Current vs
Common Mode Input Voltage
Figure 5-6 Maximum Positive Peak
Output Voltage vs Output Current
Figure 5-8 Common Mode Rejection
Ratio vs Frequency
Figure 5-10 Voltage Follower Large
Signal Pulse Response
Figure 5-12 Equivalent Input Noise
Voltage vs Frequency
Figure 5-14 Total Harmonic Distortion
vs Frequency 
| TA = 25°C | ||
| Each color represents one sample device. |
Figure 5-18 Phase
Margin vs Capacitive Load