SLOS451D December   2004  – March 2026 THS4631

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Related Products
  6. Pin Configuration Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Parameter Measurement Information
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Transimpedance Fundamentals
      2. 8.1.2 Noise Analysis
    2. 8.2 Typical Applications
      1. 8.2.1 Wideband Photodiode Transimpedance Amplifier
        1. 8.2.1.1 Detailed Design Procedure
          1. 8.2.1.1.1 Designing the Transimpedance Circuit
          2. 8.2.1.1.2 Measuring Transimpedance Bandwidth
          3. 8.2.1.1.3 Summary of Key Decisions in Transimpedance Design
          4. 8.2.1.1.4 Selection of Feedback Resistors
        2. 8.2.1.2 Application Curves
      2. 8.2.2 Alternative Transimpedance Configurations
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Slew-Rate Performance With Varying Input-Step Amplitude and Rise-and-Fall Time
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Printed-Circuit Board (PCB) Layout Techniques for High Performance
        2. 8.4.1.2 PowerPAD Design Considerations
        3. 8.4.1.3 PowerPAD PCB Layout Considerations
        4. 8.4.1.4 Power Dissipation and Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Design Tools Evaluation Fixture, Spice Models, and Applications Support
        1. 9.1.1.1 Bill of Materials
        2. 9.1.1.2 EVM
        3. 9.1.1.3 EVM Warnings and Restrictions
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Revision History

Changes from Revision C (March 2025) to Revision D (March 2026)

  • Updated thermal pad description in Table 5-1 Go
  • Updated thermal information from 95.0°C/W to 120.8°C/WGo
  • Updated thermal information from 45.8°C/W to 51.6°C/WGo
  • Updated thermal information from 58.4°C/W to 54.6°C/WGo
  • Updated thermal information from 38.3°C/W to 60.2°C/WGo
  • Updated thermal information from 9.2°C/W to 76.2°C/WGo
  • Updated thermal information from 4.7°C/W to 79.4°C/WGo
  • Added thermal information for D, DDA, and DGN packagesGo
  • Added thermal information for D, DDA, and DGN packagesGo
  • Added thermal information for D, DDA, and DGN packagesGo
  • Updated thermal information from N/A to 15.5°C/WGo
  • Updated thermal information from N/A to 11.4°C/WGo

Changes from Revision B (August 2011) to Revision C (March 2025)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added Device Information tableGo
  • Changed OPA656 Voltage Noise from 7nV/√Hz to 6nV/√Hz and Slew Rate from 290V/µs to 400V/µs in Related FET-Input-Amplifier Products Go
  • Added Pin Functions tableGo
  • Moved ESD ratings from Absolute Maximum Ratings to new ESD Ratings.Go
  • Deleted 0°C to 70°C specifications from Electrical Characteristics.Go
  • Changed 0.1dB bandwidth flatness, with 8.2pF feedback capacitor, from 38MHz to 6MHz (Typ)Go
  • Added 0.1dB bandwidth flatness, with no 8.2pF feedback capacitor, with a value of 20MHz (Typ)Go
  • Changed Static output current (sourcing) from 80mA to 90mA (Min, –40°C to +125°C), 90mA to 120mA (Min, 25°C), 98mA to 180mA (Typ, 25°C)Go
  • Changed Static output current (sinking) from –80mA to –90mA (Max, –40°C to +125°C), –85mA to –120mA (Max, 25°C), –95mA to –180mA (Typ, 25°C)Go
  • Changed Quiescent current from 13mA to 14.5mA (Max, 25°C) and 14mA to 15mA (Max, –40°C to +125°C)Go
  • Updated graphs with new silicon data to the latest standardGo
  • Changed Input Voltage vs Frequency to Input Voltage and Current Noise vs Frequency Go
  • Added current noise data to Input Voltage and Current Noise vs Frequency Go
  • Deleted Input Offset Current vs Temperature Go
  • Updated Input Bias Current vs Temperature to include input offset currentGo
  • Added typical CF = 0pF to Typical Characteristics operating conditions.Go

Changes from Revision A (March 2005) to Revision B (August 2011)

  • Changed the Tstg value in the Absolute Maximum Ratings table From: 65°C to 150°C To: –65°C to 150°CGo

Changes from Revision * (December 2004) to Revision A (March 2005)

  • Changed the Related FET Input Amplifier Products tableGo
  • Changed the Differential input resistance value From: 109 || 6.5 To: 109 || 3.9Go
  • Changed the Common-mode input resistance value From: 109 || 6.5 To: 109 || 3.9Go
  • Changed Figure 8, Third Order Harmonic Distortion vs Frequency - From: RL = 499Ω To RF = 499ΩGo
  • Changed Figure 9, Harmonic Distortion vs Output Voltage Swing - From: RL = 499Ω To RF = 499ΩGo
  • Added Figure 23, Large Signal Transient Response Go
  • Added Figure 24, Large Signal Transient Response Go
  • Added Figure 8-17, THS4631 EVM Schematic Go