SLOSEG0A November   2025  – November 2025 LOG305

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics Log Detector 
    6. 5.6 Typical Characteristics: VCC = 3.6V
    7. 5.7 Typical Characteristics: VCC = 5.25V
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Gain
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Energy Detection
        1. 8.2.1.1 Detailed Design Procedure
        2. 8.2.1.2 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Detailed Design Procedure

The incoming sensor signal is first selected by a multiplexer (mux), which allows the user to choose between different input signals. The selected signal is then filtered by a band-pass filter (BPF) to remove out of band noise and retain only the frequency of interest. The filtered signal is then applied to the LOG305 device, which performs logarithmic detection and converts the RF/analog input into a proportional DC level corresponding to the input signal energy. Finally this DC output is digitized using an ADC for further processing or monitoring in the digital domain.

  • Gain Adjustment

The maximum voltage at the internal VDET node is 2.25V. If the amplifier is configured as a buffer, the op-amp output swings to a maximum of 2.25V. If the LOG305 is powered on a 5V supply, this output swing corresponds to approximately only half of the supply voltage range. Consequently, only half of the available dynamic range of the ADC is utilized, resulting in inefficient use of the rail-to-rail output capability.

To optimize the utilization of the supply voltage range, a voltage gain is introduced to the amplifier by adding external resistors R₁ and R₂. The voltage gain of a non-inverting amplifier is defined as:

G = 1 + (R2 / R1), refer to Figure 7-1

By selecting R1 = R2 = 10kΩ, the amplifier achieves a voltage gain of 2V/V. This allows the internal maximum voltage at VDET to be scaled up to 4.5V thereby utilizing the full output range available to the LOG305. The transfer function between input to output with the internal op-amp configured at Gain = 2V/V is shown in Figure 8-3.

  • Input impedance

The LOG305 has a single input pin for accepting the input signals, called the Log_In. This pin is internally biased to a DC voltage of 1.7V. Hence TI recommends to always AC couple the signal into the Log_In pin. The log detector block is a differential circuit and hence requires the other input pin of the internal block to be defined. TI has biased this internal input pin to 1.7V similar to that of the Log_In input and connected a 90pF capacitor internally to VEE. To keep the input impedance matched TI recommends connecting a band pass filter (BPF) at Log_In such that the looking impedance into this BPF is similar to that of a 90pF capacitor. Matched capacitance/ impedance on both differential input pins of the internal detector block allows for exceptional PSRR performance.