SLOSEG2 April   2026 OPA620

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information 
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Rail-to- Rail Input
      3. 8.3.3 Rail-to- Rail Output
      4. 8.3.4 Output Drive
      5. 8.3.5 Capacitive Load and Stability
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Low-Side Current Sensing
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 CPU/GPU Supply Voltage Monitoring
        1. 9.2.2.1 Detailed Design Procedure
      3. 9.2.3 Driving Analog-to-Digital Converters
        1. 9.2.3.1 Detailed Design Procedure
      4. 9.2.4 Wide-Band Transimpedance Amplifier
        1. 9.2.4.1 Detailed Design Procedure
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Power Dissipation
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Detailed Design Procedure

The key elements of a transimpedance amplifier design include the expected diode capacitance, CD (including parasitic input common-mode and differential-mode capacitance of 2 + 2pF for the OPA620), the desired transimpedance gain (RF), and the gain-bandwidth product (GBW) of the OPA620 (100MHz typical). Once these three variables are determined, the feedback capacitor value (CF) is selected to control the frequency response. The feedback capacitance calculation should include stray capacitance, which is typically 0.2pF for surface-mount resistors

OPA620 Transimpedance
                    Amplifier Figure 9-5 Transimpedance Amplifier

To achieve a maximally flat, second-order, Butter-worth frequency response, the feedback pole must be set as shown in Equation 1

Equation 5. 12 × π × RF × CF  = GBW4 × π × RF × CD

Typical surface-mount resistors have a parasitic capacitance of approximately 0.2pF. Deduct that parasitic capacitance from the calculated feedback capacitance value. Equation 2 calculates the bandwidth:

Equation 6. f-3dB = GBW2× π × RF × CD

For even higher transimpedance bandwidth, use the high speed FET input OPA355 (200MHz GBW) or the OPA657 (1600MHz GBW)