SLUAB43 August   2026 BQ76952

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Short-Circuit Recovery Mechanism of BQ76952
    1. 2.1 Short-Circuit Recovery Mechanism of BQ76952
    2. 2.2 BQ76952 Short-Circuit Recovery Time
  6. 3Introduction to Recovery Method via CONFIG UPDATE + FET TEST
    1. 3.1 Overview of CONFIG UPDATE and FET TEST Functions
    2. 3.2 Basic Concept and Detailed Steps of Fast Short-Circuit Recovery
  7. 4Experimental Setup and Results
  8. 5Conclusion
  9. 6References

4 Experimental Setup and Results

This test utilizes the BQ76952EVM, a DC load, and a DC power supply; the specific wiring diagram is shown below:

BQ76952 Wiring Diagram & Experimental SetupFigure 4-1 BQ76952 Wiring Diagram & Experimental Setup

As shown in Figure 4-1, the DC Power Supply provides battery-side power, while the DC Electronic Load is used to simulate Pack-side quiescent current, with a 470uF capacitor configured at the electronic load side to simulate a capacitive load. Configured with Vin=12V, SCD Threshold=2.5A, SCD delay=50us, and electronic load set to 5mA, this experiment compares the recovery delays between autonomous chip recovery and the Config Update method.

Table 4-1 BQ76952 Short-Circuit Recovery Comparison Results
Autonomous Recovery Fast Recovery
Delay Time 1000ms 150ms
Test Waveforms

As shown in Table 4-1, DDSG represents the discharge FET drive signal, and Pack represents the Pack-side voltage waveform. Under autonomous short-circuit recovery of the BQ76952, the recovery time is fixed at 1s, and the Pack-side voltage fails to establish due to the capacitive load and quiescent current, leading to false identification of short-circuit events; using the method introduced in this paper, the delay time does not depend on the BQ76952 autonomous recovery time, but rather on the 150ms loop interval configured in the program for detecting SCD events, which can be adjusted according to design needs to satisfy system requirements.

The reference pseudo-code is as follows: