SLUSBN5C August   2013  – February 2026 TPS53515

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  5V LDO and VREG Start-Up
      2. 6.3.2  Enable, Soft Start, and Mode Selection
      3. 6.3.3  Frequency Selection
      4. 6.3.4  D-CAP3 Control and Mode Selection
        1. 6.3.4.1 D-CAP3™ Control Mode
        2. 6.3.4.2 Sample and Hold Circuitry
        3. 6.3.4.3 Adaptive Zero-Crossing
      5. 6.3.5  Power-Good
      6. 6.3.6  Current Sense and Overcurrent Protection
      7. 6.3.7  Overvoltage and Undervoltage Protection
      8. 6.3.8  Out-of-Bounds Operation
      9. 6.3.9  UVLO Protection
      10. 6.3.10 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Auto-Skip Eco-mode Light Load Operation
      2. 6.4.2 Forced Continuous-Conduction Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Choose the Switching Frequency
        2. 7.2.2.2 Choose the Operation Mode
        3. 7.2.2.3 Choose the Inductor
        4. 7.2.2.4 Choose the Output Capacitor
        5. 7.2.2.5 Determine the Value of R1 and R2
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Performance
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.2 Enable, Soft Start, and Mode Selection

The internal LDO regulator starts immediately and regulates to 5V at the VREG pin.

When the EN pin voltage rises above the enable threshold voltage (typically 1.4V), the controller enters the start-up sequence. The controller then uses the first 400 μs to calibrate the switching frequency setting resistance attached to the RF pin and stores the switching frequency code in internal registers. During this period, the MODE pin also senses the resistance attached to this pin to determine the operation mode. In the second phase, an internal DAC starts ramping up the reference voltage from 0V to 0.6V. The ramping up time is 1 ms. The device maintains smooth and constant ramp-up of the output voltage during start-up regardless of load current.