SLUSFL6C November   2024  – June 2025 TPSM82866C

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
      2. 7.3.2 Forced PWM Mode
      3. 7.3.3 Optimized Transient Performance from PWM to PSM Operation
      4. 7.3.4 Low Dropout Operation (100% Duty Cycle)
      5. 7.3.5 Enable and Soft-Start Ramp
      6. 7.3.6 Switch Current Limit and HICCUP Short-Circuit Protection
      7. 7.3.7 Undervoltage Lockout
      8. 7.3.8 Thermal Warning and Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Start-Up Output Voltage and I2C Target Address Selection (VSET)
      3. 7.4.3 Select Output Voltage Registers (VID)
      4. 7.4.4 Output Discharge
      5. 7.4.5 Power Good (PG)
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-Mode, Fast-Mode, and Fast-Mode Plus Protocol
      3. 7.5.3 HS-Mode Protocol
      4. 7.5.4 I2C Update Sequence
      5. 7.5.5 I2C Register Reset
  9. 8 Register Map
    1. 8.1 Target Address Byte
    2. 8.2 Register Address Byte
    3. 8.3 VOUT Register 1
    4. 8.4 VOUT Register 2
    5. 8.5 CONTROL Register
    6. 8.6 STATUS Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input and Output Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
        1. 9.4.2.1 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8 Register Map

Table 8-1 Register Map
REGISTER ADDRESS (HEX)REGISTER NAMEFACTORY DEFAULT (HEX)DESCRIPTION
0x01(1)VOUT Register 1

Set through the VSET/VID or the VSET/PG pin

Sets the target output voltage

when VSET/VID is low.

0x02(2)VOUT Register 20x64Sets the target output voltage

when VSET/VID is high

0x03CONTROL Register0xxFSets miscellaneous configuration bits
0x05STATUS Register

0xxx

Returns status flags
(1) TI does not recommend to use the following codes, as the output voltage accuracy can have a wider tolerance than the specification: 0x20, 0x40, 0x60, 0x80, 0xC4, 0xE0.
(1) Only this register will set the output voltage for devices with VSET/PG functionality
(2) Can only be accessed for devices with VSET/VID functionality