SLUSFL6C November   2024  – June 2025 TPSM82866C

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
      2. 7.3.2 Forced PWM Mode
      3. 7.3.3 Optimized Transient Performance from PWM to PSM Operation
      4. 7.3.4 Low Dropout Operation (100% Duty Cycle)
      5. 7.3.5 Enable and Soft-Start Ramp
      6. 7.3.6 Switch Current Limit and HICCUP Short-Circuit Protection
      7. 7.3.7 Undervoltage Lockout
      8. 7.3.8 Thermal Warning and Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Start-Up Output Voltage and I2C Target Address Selection (VSET)
      3. 7.4.3 Select Output Voltage Registers (VID)
      4. 7.4.4 Output Discharge
      5. 7.4.5 Power Good (PG)
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-Mode, Fast-Mode, and Fast-Mode Plus Protocol
      3. 7.5.3 HS-Mode Protocol
      4. 7.5.4 I2C Update Sequence
      5. 7.5.5 I2C Register Reset
  9. Register Map
    1. 8.1 Target Address Byte
    2. 8.2 Register Address Byte
    3. 8.3 VOUT Register 1
    4. 8.4 VOUT Register 2
    5. 8.5 CONTROL Register
    6. 8.6 STATUS Register
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input and Output Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
        1. 9.4.2.1 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Start-Up Output Voltage and I2C Target Address Selection (VSET)

During the enable delay (tDelay), the start-up output voltage and device I2C target address are set by an external resistor connected to the VSET/VID or VSET/PG pin through an internal R2D (resistor to digital) converter. The device VOUT Register 1 is also set according to the start-up voltage. Table 7-1 shows the allowed resistor values. The allowed resistor tolerance is shown in Section 6.3.

Table 7-1 Start-Up Output Voltage and I2C Target Address Options
RESISTOR (E96 SERIES, ±1% ACCURACY) AT VSET/VIDTPSM8286xxx1 START-UP OUTPUT VOLTAGETPSM8286xxx2 START-UP OUTPUT VOLTAGETPSM8286xxx3 START-UP OUTPUT VOLTAGEI2C TARGET ADDRESS
249kΩ0.575V1.15V2.30V1000 110 (0x46)
205kΩ0.550V1.10V2.20V1000 101 (0x45)
162kΩ0.525V1.05V2.10V1000 100 (0x44)
133kΩ0.500V1.00V2.00V1000 011 (0x43)
105kΩ0.475V0.95V1.90V1000 010 (0x42)
86.6kΩ0.450V0.90V1.80V1000 001 (0x41)
68.1kΩ0.425V0.85V1.70V1001 000 (0x48)
56.2kΩ0.400V0.80V1.60V1001 001 (0x49)
44.2kΩ0.375V0.75V1.50V1001 010 (0x4A)
36.5kΩ0.350V0.70V1.40V1001 011 (0x4B)
28.7kΩ0.325V0.65V1.30V1001 100 (0x4C)
23.7kΩ0.300V0.60V1.20V1001 101 (0x4D)
18.7kΩ0.275V0.55V1.10V1001 110 (0x4E)
15.4kΩ0.250V0.50V1.00V1001 111 (0x4F)
12.1kΩ0.225V0.45V0.90V1000 000 (0x40)
10kΩ0.200V0.40V0.80V1000 111 (0x47)
GND or < 1kΩ0.720V0.90V1.80V1000 110 (0x46)

The R2D converter has an internal current source, which applies current through the external resistor, and an internal ADC, which reads back the resulting voltage level. Depending on the level, the correct start-up output voltage and I2C target address are set. After this R2D conversion is finished, the current source is turned off to avoid current flowing through the external resistor. Make sure that there is no additional current path or capacitance greater than 30pF from this pin to GND during R2D conversion. Otherwise, a false value is set.

For more details, refer to the Benefits of a Resistor-to-Digital Converter in Ultra-Low Power Supplies white paper

During the ramp-up period (tRamp), the output voltage ramps to the target value set by VSET first, then ramps up or down to the new value when the value of the output register is changed by I2C interface commands.