SLUUD91 March   2025

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line and Load Regulation, Efficiency
  8. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layout
    3. 3.3 Bill of Materials
  9. 4Compliance Information
    1. 4.1 Compliance and Certifications
  10. 5Additional Information
    1. 5.1 Trademarks
  11. 6Related Documentation

2.1.1 EVM Connections

Referencing the EVM connections described in Table 2-1, the recommended test setup to evaluate the TPSM843521 is shown in Figure 2-1. Working at an ESD-protected workstation, make sure that any wrist straps, boot straps, or mats are connected and referencing the user to earth ground before handling the EVM.

TPSM843521EVM EVM Test SetupFigure 2-1 EVM Test Setup
Table 2-1 EVM Power Connections
LABELDESCRIPTION
VIN_EMI (J1)Positive input voltage power and sense connection
GND (J1)Negative input voltage power and sense connection
VOUT (J2)Positive output voltage power and sense connection
GND (J2)Negative output voltage power and sense connection
Table 2-2 EVM Signal Connections
LABELDESCRIPTION
VIN_(TP1)Measure input voltage
VOUT_sen(TP3)Measure output voltage
GND(TP8)Ground of the converter
SS/PG (TP7)Soft-start function or Power-Good function depending on the mode selection
BODE(TP9)Mode selection pin
EN (TP5)EN indicator of converter
SYNC (TP6)SYNC clock injection
Header (JP1 and JP2)Leaving JP1 and JP2 open enables the converter.
Connection (PIN-1 to PIN-2) of JP1 and (PIN-2 to PIN-3) of JP2 can set system UVLO voltage with an external resistor divider R1 and R2.
Connection (PIN-1 to PIN-2) of JP1 and (PIN-1 to PIN-2) of JP2 can disable the converter.
Header (JP13)When Power-Good mode is selected, connection (PIN-1 to PIN-2) of JP13.