SLVA745A December   2015  – April 2025 TPS7B4253-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 DDA 8-pin SO PowerPAD Package
    2. 2.2 PWP 20-pin HTSSOP (with exposed thermal pad) Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Modes and Effects Analysis (Pin FMEA)
    1. 4.1 DDA 8-pin SO PowerPAD Package
    2. 4.2 PWP 20-pin HTSSOP (with exposed thermal pad) Package
  7. 5Revision History

4.1 DDA 8-pin SO PowerPAD Package

Figure 4-1 shows the TPS7B4253-Q1 pin diagram for the DDA 8-pin SO PowerPAD™ package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS7B4253-Q1 data sheet.

TPS7B4253-Q1 Pin Diagram (DDA 8-pin SO PowerPAD ) Package Figure 4-1 Pin Diagram (DDA 8-pin SO PowerPAD™ ) Package
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 Regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. B
NC 2 No effect. Normal operation. D
GND 3 No effect. Normal operation. D
FB 4 If FB is directly connected to OUT, regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. If FB is connected by a resistor divider, VOUT tracks VIN minus the dropout voltage. B
ADJ 5 The device is disabled, resulting in no output voltage. B
GND 6 No effect. Normal operation. D
NC 7 No effect. Normal operation. D
IN 8 Power is not supplied to the device. System performance depends on upstream current limiting. B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 The device output is disconnected from the load. B
NC 2 No effect. Normal operation. D
GND 3 Ground loop parasitics are increased and transient performance can be degraded. C
FB 4 The error amplifier input is not connected. Output voltage is indeterminate. B
ADJ 5 The device state is unknown. If the device is on, the output voltage is indeterminate. B
GND 6 Ground loop parasitics are increased and transient performance can be degraded. C
NC 7 No effect. Normal operation. D
IN 8 Power is not supplied to the device. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effects Failure Effect Class
OUT 1 NC No effect. Normal operation. D
NC 2 GND No effect. Normal operation. D
GND 3 FB If FB is directly connected to OUT, regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. If FB is connected by a resistor divider, VOUT tracks VIN minus the dropout voltage. B
ADJ 5 GND The device is disabled, resulting in no output voltage. B
GND 6 NC No effect. Normal operation. D
NC 7 IN No effect. Normal operation. D
Table 4-5 Pin FMA for Device Pins Short-Circuited to Supply
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 Regulation is not possible. VOUT = VIN. B
NC 2 No effect. Normal operation. D
GND 3 Power is not supplied to the device. System performance depends on upstream current limiting. B
FB 4 Device channel is closed. If FB is tied to OUT, then VOUT = VIN. If FB is connected with a resistor divider, VOUT equals VIN if there is no loading on the device. If the loading on the device exceeds the leakage through the top feedback resistor, VOUT is pulled to 0V. B
ADJ 5 VOUT tracks VIN minus the dropout voltage. B
GND 6 Power is not supplied to the device. System performance depends on upstream current limiting. B
NC 7 No effect. Normal operation. D
IN 8 No effect. Normal operation. D