A PN diode can be manufactured in a wafer by diffusing p-type dopants into an n-type substrate or vice versa. Figure 3-1 illustrates a simple wafer fabrication flow starting with an n-type substrate (i). Next, an optional n-type layer can be deposited to control resistivity of the n-layer different to that of the substrate (ii). A p-type layer is created using either direct diffusion of dopants or through ion implantation as shown in (iii). Typically, a photomask is used to selectively define the p-type region through photolithography. Lastly, metal contacts are deposited on p- and n-type regions to complete the wafer fabrication. Keeping the contacts on top and bottom of the wafer as shown in (iv) gives a vertical PN diode, whereas contacting the n-type layer on top of the wafer through an n+ region can result in a lateral PN diode. Generally, vertical diodes are used in discrete diode products for better cost and active area utilization while lateral diodes are suitable for integrated circuits for ease of routing and interconnectivity with the CMOS or analog integrated designs. The process parameters for p- and n-type regions, mask layout and device geometry are carefully engineered to achieve stable breakdown voltage, lower leakage and lower capacitance.