3 Test Setup

To test device behavior under this condition, each short had to be a controlled variable in the test. This was established by wrapping wire around a PVC pipe to mimic the resistive and inductive properties of a short in an automotive system. This can be seen as a damaged wire harness, connection or pin failure, improper assembly, and a faulty load. Each situation can present a different level of stress to the high side switch. In addition, each high side switch was tested across a range of input voltages to see how the units reacted under higher power dissipation and thermal rise. Furthermore, each unit was shorted 50 times at each level to verify a device failure was not present. Table 3-1 displays the test procedure established when evaluating each device.

As previously described, this document highlights how the devices behave in a hot short condition. To confirm each unit was getting as hot as possible before the short, the maximum nominal current displayed in each data sheet was used during this evaluation. This was in parallel to the short configuration. Figure 3-1 displays the hardware set up to test each high side switch.

A 5-farad capacitor was placed in parallel between the supply and the HSS. This was to establish the maximum amount of current was applied during the STG test essentially preventing the supply from limiting the inrush current. Furthermore, a 330uF capacitor was connected across the input of each EVM to maintain proper load regulation when in a STG condition. Load regulation refers to how the power supply’s output voltage changes in response to variations in the load current. So, as the short was applied the input voltage can collapse if there was no capacitor to mitigate this load current change.

Moreover, to create the short the same way each time a STG board was used in this application. This is a test board intentionally designed to simulate STG faults in a system. To trigger each fault 5V was applied to the board acting as a switch between the live STG coil and the EVM ground plane.