SLVAG33 August   2026 DRV8904-Q1 , DRV8906-Q1 , DRV8908-Q1 , DRV8910-Q1 , DRV8912-Q1

 

  1.   1
  2.   Abstract
  3. 1Application Background
    1. 1.1 Device Overview
    2. 1.2 Overview of OLD Function
  4. 2OLD Application Issues and Analysis
    1. 2.1 Problem 1: OLD False Alarms Under Active Freewheeling with PWM Control
      1. 2.1.1 Problem Description
      2. 2.1.2 Cause Analysis
      3. 2.1.3 Application Recommendations
    2. 2.2 Problem 2: How to Maintain Output in the OLD State Through a Sleep-Wake Cycle
      1. 2.2.1 Problem Description
      2. 2.2.2 Cause Analysis
      3. 2.2.3 Waveform Verification
      4. 2.2.4 Application Recommendations
    3. 2.3 Problem 3: How LOLD (Low-Current Open-Load Detection) is Triggered
      1. 2.3.1 Problem Description
      2. 2.3.2 Cause Analysis
      3. 2.3.3 Waveform Verification
      4. 2.3.4 Application Recommendations
  5. 3Conclusion
  6. 4References

2.2.1 Problem Description

The DRV89xx-Q1 operates normally after initial power-on, with the output voltage stable at 11V. However, after going through a sleep-wake (nSLEEP low-to-high transition) cycle, even if OLD_OP = 1b is set (maintain high output when an OLD fault occurs), the output voltage remains low; subsequently, if CLR_FLT is executed again, the output will experience a brief high level but cannot be maintained, and the voltage drop rate between channels varies depending on the load.

In some application scenarios, even when the chip detects an open circuit, the output voltage needs to be maintained continuously. For example, the OLD channel output might supply power to both inside and outside the board simultaneously; when an off-board load experiences an open circuit, it is desirable for the inside-board supply voltage to be maintained.