SLVS181K December   1998  – December 2025 TPS763

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Thermal Shutdown
      5. 6.3.5 Output Pulldown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Device Feedback Resistors
      2. 7.1.2 Capacitor Selection (Legacy Chip)
      3. 7.1.3 Recommended Capacitor Types (New Chip)
      4. 7.1.4 Input and Output Capacitor Requirements (New Chip)
      5. 7.1.5 Reverse Current
      6. 7.1.6 Feed-Forward Capacitor (CFF)
      7. 7.1.7 Power Dissipation (PD)
      8. 7.1.8 Estimating Junction Temperature
      9. 7.1.9 Special Consideration for Line Transients (New Chip)
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Transient Response
        2. 7.2.2.2 Selecting Feedback Divider Resistors
        3. 7.2.2.3 Thermal Dissipation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Input and Output Capacitor Requirements (New Chip)

For legacy chip, although not required, a 0.047μF or larger ceramic bypass input capacitor, connected between IN and GND and located close to the TPS763, is recommended to improve transient response and noise rejection. A higher-value electrolytic input capacitor can be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source.

For new chip, although an input capacitor is not required for stability, good analog design practice is to connect a capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient response, input ripple, and PSRR. Use an input capacitor if the source impedance is more than 0.5Ω. A higher value capacitor can be necessary if large, fast rise-time load or line transients are anticipated or if the device is located several inches from the input power source.

For the new chip, dynamic performance of the device is improved with the use of an output capacitor. Use an output capacitor within the range specified in the Recommended Operating Procedures table for stability.