SLVS349F November   2001  – December 2025 TPS794

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. 6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Shutdown
      3. 7.3.3 Active Discharge (new chip)
      4. 7.3.4 Foldback Current Limit
      5. 7.3.5 Thermal Protection
      6. 7.3.6 Reverse Current
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
      2. 8.1.2 Exiting Dropout
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Capacitor Recommendations
        2. 8.2.1.2 Input and Output Capacitor Requirements
        3. 8.2.1.3 Noise Reduction and Feed-Forward Capacitor Requirements
      2. 8.2.2 Application Curves
    3. 8.3 Layout
      1. 8.3.1 Board Layout Recommendation to Improve PSRR and Noise Performance
      2. 8.3.2 Power Dissipation
      3. 8.3.3 Thermal Information
        1. 8.3.3.1 Regulator Mounting
      4. 8.3.4 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.3.1 Board Layout Recommendation to Improve PSRR and Noise Performance

To improve ac measurements such as PSRR, output noise, and transient response, design the board with separate ground planes for VIN and VOUT, with each ground plane connected only at the ground pin of the device. In addition, the ground connection for the bypass capacitor must connect directly to the ground pin of the device.