SLVS751F November   2007  – April 2026 TPS5430-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information (DDA Package)
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Oscillator Frequency
      2. 6.3.2  Voltage Reference
      3. 6.3.3  Enable (ENA) and Internal Slow Start
      4. 6.3.4  Undervoltage Lockout (UVLO)
      5. 6.3.5  Boost Capacitor (BOOT)
      6. 6.3.6  Output Feedback (VSENSE) and Internal Compensation
      7. 6.3.7  Voltage Feed Forward
      8. 6.3.8  Pulse-Width Modulation (PWM) Control
      9. 6.3.9  Overcurrent Limiting
      10. 6.3.10 Overvoltage Protection (OVP)
      11. 6.3.11 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Operation near Minimum Input Voltage
      2. 6.4.2 Operation With ENA Control
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Application Circuit, 12V to 5V
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 7.2.1.2.2 Switching Frequency
          3. 7.2.1.2.3 Input Capacitors
          4. 7.2.1.2.4 Output Filter Components
            1. 7.2.1.2.4.1 Inductor Selection
            2. 7.2.1.2.4.2 Capacitor Selection
          5. 7.2.1.2.5 Output Voltage Setpoint
          6. 7.2.1.2.6 Boot Capacitor
          7. 7.2.1.2.7 Catch Diode
          8. 7.2.1.2.8 Advanced Information
            1. 7.2.1.2.8.1 Output Voltage Limitations
            2. 7.2.1.2.8.2 Internal Compensation Network
            3. 7.2.1.2.8.3 Thermal Calculations
        3. 7.2.1.3 Application Curves
      2. 7.2.2 9V to 21V Input to 5V Output Application Circuit
      3. 7.2.3 Circuit Using Ceramic Output Filter Capacitors
        1. 7.2.3.1 Output Filter Component Selection
        2. 7.2.3.2 External Compensation Network
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

9 Revision History

Changes from Revision E (January 2024) to Revision F (April 2026)

  • Updated ENA pin description by adding information about internal 1.5MΩ pullup resistor in the Pin Configuration and Functions sectionGo
  • Updated VIN pin description by adding information regarding the recommended distance of the bypass capacitor in Pin Configuration and Functions Go
  • Added note to the Absolute Maximum table allowing BOOT to PH internally generated voltage up to 10V.Go
  • Updated table note 3 in Thermal Information section to include EVM theta JAGo
  • Added text describing 1.5MΩ pullup resistor in ENA floating use case in Overview Go
  • Deleted the 5uA current source and added a 1.5MΩ pullup resistor in the functional block diagramGo
  • Updated the Enable (ENA) and Internal Slow Start section by deleting current information and adding internal 1.5MΩ pullup resistor informationGo

Changes from Revision D (April 2015) to Revision E (January 2024)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Updated the data sheet title to include "Automotive". Added WEBENCH® links throughout the data sheet. Added "integrated circuit" when the PowerPAD package is mentioned. Changed MOSFET resistance from 110 mΩ to100 mΩ. Changed I Q from 18 μA to 15 μA.Go
  • Updated notes for Package Information table. Updated precision to two significant digits.Go
  • Changed pin configuration figure title to "DDA Package 8-Pin SOIC With Thermal Pad Top View" and moved the title to the correct position. Changed "PowerPAD" to "DAP".Go
  • Updated absolute maximum table to new format which does not include specific parameter names and does include min and max columns. TJ called out in header.  Pin names are used rather than signal names.  BOOT and PH voltages now marked as output voltage. Updated footnotes and removed Note 2.Go
  • Changed BOOT to PH Absolute Maximum from 10 V to 6 V.Go
  • Removed Absolute Maximum BOOT to GND maximum voltage.Go
  • Removed MM ESDGo
  • Changed CDM ESD from ±1500 V to ±750 VGo
  • Changed recommended operating "VI" to "input voltage".Go
  • Updated thermal information footnotes to match current TI standards which include JEDEC standard information.  Added EVM RθJA information.Go
  • Changed RθJA from 41.2 to 42.3, RθJC(top)  from 44.4 to 46, RθJB from 22.1 to 15, ψJB from 21.9 to 15.3, and RθJC(bot) from 3 to 6.Go
  • Added condition for typical specifications EC table’s header, added parameter names, and used pin names in parameter descriptions.  Footnote added.Go
  • Changed test condition for VFB from “IO = 0 A to 3 A” to “TJ = –40°C to 125°C”, Changed rDS(ON) to RDSON(HS) and test condition to for RDSON(HS) from “VIN = 5.5 V” to “VIN = 5.5 V, VBOOT-SW = 4.0 V”.Go
  • Changed the name of IQ to ISD(VIN) if ENA is low and IQ(VIN) if the chip is active.Go
  • Added test condition for DMAX, “fSW = 500 kHz” and for second RDSON(HS) spec “VIN = 12 V, VBOOT-SW = 4.5 V”.Go
  • Changed IQ(VIN) typical from 3 mA to 2 mA, ISD(VIN) typical from 18 µA to 15 µA, VINUVLO(H) from 330 mV to 0.35 V, and VEN(H) from 450 mV to 325 mV.Go
  • Changed RDS(ON) with VIN = 5 V typical from 150 mΩ to 125 mΩ and with VIN = 12 V from 110 mΩ to 100 mΩ.Go
  • Changed "110-mΩ high-side MOSFET" to "100-mΩ high-side MOSFET" and 18 µA to 15 µA in Overview Go
  • Change "PowerPAD" to "DAP" in functional block diagram.Go
  • Changed shutdown current from 18 μA to 15 μA in Enable (ENA) and Internal Slow Start sectionGo
  • Changed UVLO hysteresis from 330mV to 350mV in UVLO description.Go
  • Changed "PwPd" to "DAP" on the TPS5430DDA package drawing in Figure 7-1 and "exposed thermal pad" to "DAP" in circuit description. Go
  • Added "Custom Design With WEBENCH® Tools" sectionGo
  • Changed "PwPd" to "DAP" on the TPS5430DDA package drawing in Figure 7-9 and Figure 7-10.Go
  • Changed "PwPd" to "DAP" on the TPS5430DDA package drawing in Figure 7-11.Go
  • Deleted land pattern from Layout Example sectionGo
  • Added "Custom Design With WEBENCH® Tools" sectionGo