SLVSHL6A June   2025  – December 2025 TPSI2260-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Avalanche Robustness
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Dielectric Withstand Testing (HiPot)
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure - Chassis Ground Reference
      4. 9.2.4 Application Performance Plot
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

3 Description

The TPSI2260-Q1 is an isolated solid state relay designed for high voltage automotive and industrial applications. The TPSI2260-Q1 uses TI's high reliability reinforced capacitive isolation technology in combination with internal back-to-back MOSFETs to form a completely integrated solution requiring no secondary side power supply. The TPSI2260-Q1 improves system reliability as TI's capacitive isolation technology does not suffer from mechanical wearout or photo degradation failure modes common in mechanical relay and photo relay components.

The primary side of the device is powered by only 5mA of input current and incorporates a fail-safe EN pin preventing any possibility of back powering the VDD supply. In most applications, the VDD pin of the device should be connected to a system supply between 4.5V to 20V and the EN pin of the device should be driven by a GPIO output with Logic high between 2.1V to 20V. In other applications, the VDD and EN pins could be driven together driven together directly from the system supply or from a GPIO output.

The secondary side consists of back-to-back MOSFETs with a standoff voltage of ±600V from S1 to S2. The TPSI2260-Q1 MOSFET avalanche robustness and thermally conscious package design allow it to robustly support system level dielectric withstand testing (HiPot) and DC fast charger surge currents of up to 1mA (3mA for TPSI2260T-Q1)without requiring any external components.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TPSI2260-Q1DWQ (SOIC, 11)10.3mm × 7.5mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
TPSI2260-Q1 TPSI2260-Q1 Simplified Application Schematic TPSI2260-Q1 Simplified Application Schematic