Component placement:

Decoupling capacitors for the primary side VDD supply must be placed as close as possible to the device pins.

EMI considerations:

The TPSI2260-Q1 employs spread spectrum modulation (SSM) with a power transfer frequency of 2 MHz to improve its EMI capabilities. In most applications no additional system design considerations are required to meet the CISPR 25 Class 5 standard performance.

If CISPR25 Class 5 is required on the secondary side, a split limiting resistor configuration is recommended for best EMI performance, as shown in TPSI2260-Q1 Layout Example.

ESD Considerations:

No additional components are required to pass IEC 61000-4-2 up-to 6kV contact.

If contact >6kV strikes is required, a split resistance configuration increases ESD performance to >8kV contact. Alternatively, ESD capacitors between primary and secondary side can be added to improve ESD performance in non-split resistance architectures.

High-voltage considerations:

The creepage from the primary side to the secondary side and the creepage from the S1 pin to S2 pin of the TPSI2260-Q1 should be maintained according to system requirements. It is most likely that the system designer will avoid any top layer PCB routing underneath the body of the package or between the S1, SM and S2 pins.