SLVSI86 January   2025 TSM36A-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings—AEC Specification
    3. 5.3 ESD Ratings—IEC Specification
    4. 5.4 ESD Ratings - ISO Specifications
    5. 5.5 Recommended Operating Conditions
    6. 5.6 Thermal Information
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
  8. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

5.7 Electrical Characteristics

TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VRWM Reverse stand-off voltage 0 36 V
VBRF Forward breakdown voltage(1) IIO = –10mA 0.8 V
VBRR Reverse breakdown voltage(1) IIO = 10mA 37.8 44.2 V
VCLAMP Surge clamping voltage, tp = 8/20µs (2) IPP = 25A, from IO to GND 50 V
IPP = 40A, from IO to GND 57
ILEAK Leakage current VIO = +36V 1 μA
RDYN Dynamic resistance tp = 8/20µs, from IO to GND 0.5 Ω
CLINE Line capacitance VIO = 0V, f = 1MHz, Vp-p = 30mV 50 80 pF
(1) VBRF and VBRR are defined as the voltage when ±10mA is applied in the positive-going direction. 
(2) Device stressed with 8/20μs exponential decay waveform according to IEC 61000-4-5.