SLVSIY7 August   2025 LM5168E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Control Architecture
      2. 7.3.2  Internal VCC Regulator and Bootstrap Capacitor
      3. 7.3.3  Internal Soft Start
      4. 7.3.4  On-Time Generator
      5. 7.3.5  Current Limit
      6. 7.3.6  N-Channel Buck Switch and Driver
      7. 7.3.7  Synchronous Rectifier
      8. 7.3.8  Enable/Undervoltage Lockout (EN/UVLO)
      9. 7.3.9  Power Good (PGOOD)
      10. 7.3.10 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 Sleep Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Buck Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency (RT)
        2. 8.2.2.2 Buck Inductor Selection
        3. 8.2.2.3 Setting the Output Voltage
        4. 8.2.2.4 Type 3 Ripple Network
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Considerations
        7. 8.2.2.7 CBST Selection
        8. 8.2.2.8 Example Design Summary
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Compact PCB Layout for EMI Reduction
        2. 8.4.1.2 Feedback Resistors
      2. 8.4.2 Thermal Considerations
      3. 8.4.3 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.5 Current Limit

The LM5168E manages overcurrent conditions with cycle-by-cycle current limiting of the peak inductor current. The current sensed in the high-side MOSFET is compared every switching cycle to the current limit threshold (0.42A typical). To protect the converter from potential current runaway conditions, the LM5168E includes a foldback valley current limit feature, set at 0.34A, that is enabled if a peak current limit is detected. As shown in Figure 7-1, if the peak current in the high-side MOSFET exceeds 0.42A for the LM5168E (typical), the present cycle is immediately terminated regardless of the programmed on time (tON), the high-side MOSFET is turned off and the fold-back valley current limit is activated. The low-side MOSFET remains on until the inductor current drops below this fold-back valley current limit, after which the next on-pulse is initiated. This method folds back the switching frequency to prevent overheating and limits the average output current to less than 0.3A for LM5168E to provide proper short-circuit and heavy-load protection.

LM5168E Current Limit Timing DiagramFigure 7-1 Current Limit Timing Diagram

Current is sensed after a leading-edge blanking time following the high-side MOSFET turn-on transition. The propagation delay of the current limit comparator is 100ns. During high step-down conditions when the on time is less than 100ns, a back-up peak current limit comparator in the low-side MOSFET, also set at 0.42A, enables the foldback valley current limit set at 0.34A. This current limit scheme enables ultra-low duty-cycle operation, permitting large step-down voltage conversions while ensuring robust protection of the converter.

The LM5168E implements a current limit off-timer and hiccup protection. If the current in the high-side MOSFET exceeds IHS_PK(OC), the high-side MOSFET is immediately turned off and a non-resettable off-timer is initiated. The length of the off time is controlled by the FB voltage and the input voltage. In hiccup protection, a soft-start counter enables the output voltage to recover properly after an overcurrent event is detected for 16 consecutive current limit cycles. After four consecutive cycles without current limit detection, the device restarts the hiccup protection counter. The device attempt soft start after a "hiccup period" of 64ms.