at
TA = 25°C, temperature curves specify ambient temperature, VDD = 5V,
100nF ac-coupling capacitors at input and output, 50Ω single-ended input, and 100Ω
differential output (unless otherwise noted)

| PIN = –20dBm
with 50Ω source at all excited ports, |
| nonexcited ports are
terminated with 50Ω |
Figure 5-1 Power Gain
Across Temperature
| PIN = –20dBm
with 50Ω source at all excited ports, |
| nonexcited ports are
terminated with 50Ω |
Figure 5-3 Input Return Loss Across
Temperature
| PIN = –20dBm
with 50Ω source at all excited ports, |
| nonexcited ports are
terminated with 50Ω |
Figure 5-5 Reverse Isolation Across
Temperature
| PIN = –20dBm
with 50Ω source at all excited ports, |
| nonexcited ports are
terminated with 50Ω |
Figure 5-7 Output Return Loss Across
Temperature
| PO /tone =
–5dBm, 10MHz tone spacing |
Figure 5-9 OIP3 Across Temperature
Figure 5-11 OIP3 Across Output Power
At
(2f1-f2) frequency, f1 < f2;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-13 IMD3 Lower Across
Temperature
At
(2f2-f1) frequency, f1 < f2;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-15 IMD3 Higher Across
Temperature
At
(2f1-f2) frequency, f1 < f2;
10MHz tone spacing |
Figure 5-17 IMD3 Lower Across Output
Power
At
(f2-f1) frequency, f2 > f1;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-19 OIP2 Lower Across
Temperature
At
(f2+f1) frequency, f2 > f1;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-21 OIP2 Higher Across
Temperature
At
(f2-f1) frequency, f2 > f1;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-23 IMD2 Lower Across
Temperature
At
(f2+f1) frequency, f2 > f1;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-25 IMD2 Higher Across
Temperature
At
(f2-f1) frequency, f2 > f1;
10MHz tone spacing |
Figure 5-27 IMD2 Lower Across Output
Power
Figure 5-29 HD2 Across Temperature
Figure 5-31 HD3 Across Temperature
Figure 5-33 HD2 Across Output Power
Figure 5-35 Output P1dB Across
Temperature
Figure 5-37 NF Across Temperature
Figure 5-39 Gain Imbalance Across
Temperature
Figure 5-41 Phase Imbalance Across
Temperature
Figure 5-43 CMRR Across Temperature
Figure 5-45 Output Power Across Input Power
Figure 5-47 Overdrive Recovery Response
Figure 5-49 Turn-on time
Figure 5-51 Additive (Residual) Phase Noise
| PIN = –20dBm
with 50Ω source at all excited ports, |
| nonexcited ports are
terminated with 50Ω |
Figure 5-2 Power Gain
Across VDD
| PIN = –20dBm
with 50Ω source at all excited ports, |
| nonexcited ports are
terminated with 50Ω |
Figure 5-4 Input Return Loss Across
VDD
| PIN = –20dBm
with 50Ω source at all excited ports, |
| nonexcited ports are
terminated with 50Ω |
Figure 5-6 Reverse Isolation Across
VDD
| PIN = –20dBm
with 50Ω source at all excited ports, |
| nonexcited ports are
terminated with 50Ω |
Figure 5-8 Output Return Loss Across
VDD
| PO /tone =
–5dBm, 10MHz tone spacing |
Figure 5-10 OIP3 Across VDD
Figure 5-12 OIP3 Across Tone Spacing
At
(2f1-f2) frequency, f1 < f2;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-14 IMD3 Lower Across
VDD
At
(2f2-f1) frequency, f1 < f2;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-16 IMD3 Higher Across
VDD
At
(2f2-f1) frequency, f1 < f2;
10MHz tone spacing |
Figure 5-18 IMD3 Higher Across Output
Power
At
(f2-f1) frequency, f2 > f1;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-20 OIP2 Lower Across
VDD
At
(f2+f1) frequency, f2 > f1;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-22 OIP2 Higher Across
VDD
At
(f2-f1) frequency, f2 > f1;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-24 IMD2 Lower Across
VDD
At
(f2+f1) frequency, f2 > f1;
PO /tone = –5dBm, 10MHz tone
spacing |
Figure 5-26 IMD2 Higher Across
VDD
At
(f2+f1) frequency, f2 > f1;
10MHz tone spacing |
Figure 5-28 IMD2 Higher Across Output
Power
Figure 5-30 HD2 Across VDD
Figure 5-32 HD3 Across VDD
Figure 5-34 HD3 Across Output Power
Figure 5-36 Output P1dB Across
VDD
Figure 5-38 NF Across VDD
Figure 5-40 Gain Imbalance Across
VDD
Figure 5-42 Phase Imbalance Across
VDD
Figure 5-44 CMRR Across VDD
| Low frequency cut-off as
a function of ac-coupling cap |
Figure 5-46 Low Frequency Gain Response
Figure 5-48 Step Response
Figure 5-50 Turn-off time