SLVSJC3 September   2025 BQ79826Z-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Device and Documentation Support
    1. 5.1 Documentation Support
    2. 5.2 Receiving Notification of Documentation Updates
    3. 5.3 Support Resources
    4. 5.4 Trademarks
    5. 5.5 Electrostatic Discharge Caution
    6. 5.6 Glossary
  7. 6Mechanical, Packaging, and Orderable Information
    1. 6.1 Package Option Addendum
    2. 6.2 Tape and Reel Information
    3. 6.3 Mechanical Data

4 Pin Configuration and Functions

See the GPIO Configuration Table for the full GPIO functions list and behavior. Most GPIO functions are listed in the pin-outs, but some functions that move or interact with other pins are not fully described in Section 4.

BQ79826Z-Q1 BQ79826Z Pin Configuration

Figure 4-1 BQ79826Z Pin Configuration
Table 4-1 Pin Functions
Pin Name Type Description
BQ79826Z No
NC 1 NC Do not connect. Not internally connected to the die.
NC 2 NC Do not connect. Not internally connected to the die.
NC 3 NC Do not connect. Not internally connected to the die.
NC 4 NC Do not connect. Not internally connected to the die.
BATPWR 5 P Power supply input to the DC-DC converter. Connect to BAT.
BAT 6 P Power supply input and top of module measurement input. Connect to the top cell of the battery module. Bypass a capacitor to VSS.
CBxx Odd Pins 7-23 I

Cell balance connection.

Require differential RC filter, which the filter resistor also set the internal balance current.
VCxx Even Pins 8-22 I

Cell voltage sense input.

Connect to the positive terminal of cell below. Requires differential RC filter.
NC 24 NC Do not connect. Not internally connected to the die.
NC 25 NC Do not connect. Not internally connected to the die.
NC 26 NC Do not connect. Not internally connected to the die.
CBxx Odd Pins 27-63 I

Cell balance connection.

Require differential RC filter, which the filter resistor also set the internal balance current.
VCxx Even Pins 28-62 I

Cell voltage sense input.

Connect to the positive terminal of cell below. Requires differential RC filter.
REF_CAP 64 R 1st ADC reference output pin, bypass with a capacitor to REF_VSS.
REF_VSS 65 GND Ground connection for the precision reference REF_CAP and TSREF. Connect to VSS, please refer layout guidance for layout.
TSREF 66 R 2nd ADC reference output pin, also provides bias voltage for thermistor. Bypass TSREF with a capacitor to REF_VSS.
GPIO20 67 I/O GPIOx can be used as general-purpose input/output like digital I/O, analog input, etc.
GPIO19 68 I/O
GPIO18 69 I/O
GPIO17 / INT5 70 I/O
GPIO16 / nCSS1 71 I/O Selectable as SPI controller (hub) interface to peripheral devices or GPIO.
GPIO15 / CSDI / INT4 72 I/O
GPIO14 / CSDO 73 I/O
GPIO13 / CSCLK 74 I/O
GPIO12 75 I/O GPIOx can be used as general-purpose input/output like digital I/O, analog input, etc.
GPIO11 76 I/O
GPIO10 / I2C_SDA 77 I/O Selectable as I2C controller (hub) or GPIO.
GPIO9 / INT3 / I2C_SCL 78 I/O
GPIO8 / EIS_PWM 79 I/O GPIOx can be used as general-purpose input/output like digital I/O, analog input, etc.

Electrochemical impedance spectroscopy PWM output.
GPIO7 / nPCS / INT2 80 I/O Selectable as SPI device control or GPIO.
GPIO6 / PSDO 81 I/O
GPIO5 / PSDI / SMON 82 I/O
GPIO4 / PSCLK 83 I/O
GPIO3 / NFAULT / INT1 84 I/O Selectable as NFAULT interrupt pin or GPIO
EIS_SRP 85 I/O GPIOx can be used as general-purpose input/output like digital I/O, analog input, etc.

Electrochemical impedance spectroscopy differential current sense input.
EIS_SRN 86 I/O
VIO 87 P Input supply voltage for GPIOs. Connect direclty to AVDD or an external IO supply.
AVDD 88 P Regulated output. AVDD supplies the internal analog circuits as well as up to xxmA of external Load. Bypass AVDD with a capacitor to AVSS
AVSS 89 GND Analog reference ground.
DVDD 90 R Digitial supply. Connect cap from DVDD_CAP to DVSS.
VSS 91 GND Digital ground. Bonded to pad.
LDOIN 92 I/O Regulated supply input. Connect to the output of the DC-DC buck converter. Bypass LDOIN to VSS with a capacitor.
COMLP 93 I/O AC coupled bi-directional I/O pin for daisy chain (VIF) communication. Do not apply external DC voltage to this pin. Connect to COMHN/P of adjacent device through proper isolation. Leave disconnected if not used.
COMLN 94 I/O
COMHN 95 I/O
COMHP 96 I/O
MODE 97 I/O Connect resistor to ground. Configures the settings for AVDD status during SHUTDOWN and DEEPSLEEP and device multidrop or non-multidrop.
NC 98 NC Do not connect. Not internally connected to the die.
SW 99 P DC-DC switch node. Connect to inductor.
BTSP 100 P Buck converter bootstrap. Connect bootstrap capacitor from BTSP to SW.

P = Power, GND = Device ground, R = reference, I = Cell or BB Input, I/O = Input/Output, NC = No connect

Mode Pin Configuration

The MODE pin must be configured with a resistor to ground (RMODE). The resistor is chosen based on the operating mode and the devices communication type as either as non-multidrop or multidrop device.

Table 4-2 MODE Pin Configuration
RMODE Value AVDD Mode in SHUTDOWN and DEEP SLEEP Multidrop
RMODE < 413kΩ or Open ON No
132kΩ < RMODE < 168kΩ ON Yes
49kΩ < RMODE < 63kΩ OFF Yes
RMODE < 21kΩ OFF No