SLVSL58 September   2026

ADVANCE INFORMATION  

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
    5. 1.5 Getting Started with the ADS111C04EVM
  8. 2Hardware
    1. 2.1 ADS111C04EVM and ADS111C02EVM
      1. 2.1.1 Power Supplies (ADS111C02EVM and ADS111C04EVM)
      2. 2.1.2 Serial Interface (ADS111C02EVM and ADS111C04EVM)
        1. 2.1.2.1 Digital Signal Connections (ADS111C02EVM and ADS111C04EVM)
        2. 2.1.2.2 Level Translator (ADS111C02EVM and ADS111C04EVM)
      3. 2.1.3 ADS111C04EVM
        1. 2.1.3.1 ADC Connections and Decoupling (ADS111C04EVM)
        2. 2.1.3.2 Analog Inputs (ADS111C04EVM)
      4. 2.1.4 ADS111C02EVM
        1. 2.1.4.1 ADC Connections and Decoupling (ADS111C02EVM)
        2. 2.1.4.2 Analog Inputs (ADS111C02EVM)
    2. 2.2 ADS111S04EVM and ADS111S02EVM
      1. 2.2.1 Power Supplies (ADS111S02EVM and ADS111S04EVM)
      2. 2.2.2 Serial Interface (ADS111S02EVM and ADS111S04EVM)
        1. 2.2.2.1 Digital Signal Connections (ADS111S02EVM and ADS111S04EVM)
        2. 2.2.2.2 Level Translator (ADS111S02EVM and ADS111S04EVM)
      3. 2.2.3 ADS111S04EVM
        1. 2.2.3.1 ADC Connections and Decoupling (ADS111S04EVM)
        2. 2.2.3.2 Analog Inputs (ADS111S04EVM)
      4. 2.2.4 ADS111S02EVM
        1. 2.2.4.1 ADC Connections and Decoupling (ADS111S02EVM)
        2. 2.2.4.2 Analog Inputs (ADS111S02EVM)
  9. 3Software
    1. 3.1 Software Description
  10. 4Hardware Design Files
    1. 4.1 Schematics (ADS111C04EVM)
    2. 4.2 Schematics (ADS111C02EVM)
    3. 4.3 Schematics (ADS111S04EVM)
    4. 4.4 Schematics (ADS111S02EVM)
    5. 4.5 Schematics (EVM Hardware)
    6. 4.6 PCB Layouts
    7. 4.7 Bill of Materials (BOM)
  11. 5Additional Information
    1. 5.1 Trademarks

2.2.2 Serial Interface (ADS111S02EVM and ADS111S04EVM)

The EVM uses serial peripheral interface (SPI) for serial communication. The serial interface is used to read conversion data, configure device registers, and control ADC conversions. The serial interface consists of four signals: CS, SCLK, DIN, and DOUT/DRDY. CS can be tied low to operate the interface in 3-wire SPI mode. The host always drives SCLK and the EVM always acts as the peripheral. The interface only supports the SPI mode where SCLK idles low data updates on SCLK rising edges, and data latches on SCLK falling edges (CPOL = 0 and CPHA = 1). The interface supports full-duplex operation such that input data and output data can be transmitted simultaneously.