SLVSLJ1 September   2026

 

  1.   1
  2. 1Description
  3. 2Features
  4.   4
  5. 3Evaluation Module Overview
    1. 3.1 Introduction
    2. 3.2 Kit Contents
    3. 3.3 Specification
    4. 3.4 Device Information
  6. 4Hardware
    1. 4.1 Setup
      1. 4.1.1 Quick Start Setup
      2. 4.1.2 Measurements
    2. 4.2 Circuitry
      1. 4.2.1 R1, R2, R3, C2, C5
      2. 4.2.2 C1
      3. 4.2.3 R4
      4. 4.2.4 U1
        1. 4.2.4.1 J3
    3. 4.3 General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  7. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layout
    3. 5.3 Bill of Materials
  8. 6Additional Information
    1. 6.1 Trademarks
  9. 7Related Documentation

4.2.4.1 J3

J3 is unpopulated by default, but can be populated with header pins to allow for sensing the voltage across the device shunt inputs closer to the device. Although test points are populated for all device pins, untented vias on the board can be used to take measurements closer to the device.