SLVSLM9 August   2026 ESD2CANFD60-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings—AEC Specification
    3. 5.3 ESD Ratings—IEC Specification
    4. 5.4 ESD Ratings - ISO Specification
    5. 5.5 Recommended Operating Conditions
    6. 5.6 Electrical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
  8. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 Tape and Reel Information
    2. 9.2 Mechanical Data

5.6 Electrical Characteristics

over TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VRWM Reverse stand-off voltage Both Positive and Negative 60 V
VBR Breakdown voltage IIO = ±10mA, IO to GND, Both Positive and Negative 63 V
ILEAK Leakage current, any IO pin to GND VIO = ±60V, Both Positive and Negative 2 50 nA
VCLAMP Clamping voltage(1) IPP = 1A, tp = 8/20µs, from IO to GND 71 V
VCLAMP Clamping voltage(1) IPP = 4A, tp = 8/20µs, from IO to GND 85 V
VCLAMP Clamping voltage(2) IPP = 16A, TLP, from IO to GND 92 V
RDYN Dynamic resistance(2) IO to GND and GND to IO 0.75 Ω
CL Line capacitance, any IO to GND VIO = 0V, f = 1MHz, Vp-p = 30mV 2 pF
(1) Device stressed with 8/20 μs exponential decay waveform according to IEC 61000-4-5.
(2) Non-repetitive current pulse, Transmission Line Pulse (TLP); square pulse; ANSI / ESD STM5.5.1-2008