SLVUAF6A June   2015  – May 2021 TPS62745

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
  3. 2Setup
    1. 2.1 Input/Output Connector Descriptions
    2. 2.2 Operation
  4. 3Common Efficiency Measurement Errors with Ultra-Low Iq Devices
    1. 3.1 Efficiency Measurement Setup
    2. 3.2 Pullup and Pulldown Resistors
  5. 4Board Layout
  6. 5Schematic and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Bill of Materials
  7. 6Revision History

Input/Output Connector Descriptions

J1 – VINPositive input connection from the input supply for the EVM (3.3 V to 10 V)
J2 – S+/S-Input voltage sense connections. Measure the input voltage at this point.
J3 – GNDReturn connection from the input supply for the EVM.
J4 – VOUTOutput voltage connection.
J5 – S+/S-Output voltage sense connections. Measure the output voltage at this point.
J6 – GNDOutput return connection.
J7 – PG/GNDThe PG output appears on pin 1 of this header with a convenient ground on pin 2.
J8 VIN_SWVIN switch output connection.
J9 SW/GNDSwitch Node sense connection.
JP1 – ENEN pin input jumper. Place the supplied jumper across ON and EN to turn on the IC. Place the jumper across OFF and EN to turn off the IC.
JP2 – EN_VIN_SWEnable VIN switch jumper. Place the supplied jumper across VIN_SW_ON and EN_VIN_SW to activate (close) the internal VIN switch. Place the jumper across VIN_SW_OFF and EN_VIN_SW to de-activate (open) the internal VIN switch.
JP3 through JP6 – VSELxThese four inputs set the output voltage. By connecting each pin high or low, the output voltage is programmed per Table 2-1. Do not leave any jumper open for proper operation.

Table 2-1 provides the output voltage settings for the TPS62745EVM-622. A 0 refers to logic low, while 1 refers to logic high.

Table 2-1 Output Voltage Settings
VOUTVSEL 4VSEL 3VSEL 2VSEL 1
1.80000
1.90001
2.00010
2.10011
2.20100
2.30101
2.40110
2.50111
2.61000
2.71001
2.81010
2.91011
3.01100
3.11101
3.21110
3.31111