SLVUC72C October 2021 – November 2022 TPSI3050-Q1
Table 2-1 shows the functionality of the test points, connectors, and terminal block.Table 2-2 shows the pin functions.
Name | Description |
|---|---|
| J2 | VDDP power select input |
| J4 | Power transfer select |
TP1, TP2 | VSSP test point |
| TP3 | VDDP signal test point |
| TP4 | EN signal test point |
| TP5 | PXFR signal test point |
| TP6 | VDDM signal test point |
| TP7 | VDRV signal test point |
| TP8 | VSSS signal test point |
| TP9 | VGATE signal test point |
TP10 | VDDH signal test point |
TP11 | SW1 signal test point |
TP12 | SW2 signal test point |
Pin Name | Description |
|---|---|
| EN | Active high driver enable |
| PXFR | Power transfer may be adjusted by selecting one of seven power level settings using an external resistor from the PXFR pin to VSSP. |
| VDDP | Power supply for primary side |
| VSSP | Ground supply for primary side |
| VSSS | Ground supply for secondary side |
| VDDM | Generated mid supply |
| VDDH | Generated high supply |
| VDRV | Active high driver output |