SLVUDL7 December   2025

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Pin Configuration of the ISOW6441 Quad-Channel Digital Isolator With Integrated DC-DC Converter
    2. 2.2 EVM Setup and Operation
      1. 2.2.1 EVM Setup
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layout and 3D Diagram
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks

EVM Setup

This section describes the typical setup and operation of the EVM for device evaluation. Figure 2-3 shows a typical test configuration for operating the ISOW6441DWEEVM using two power supplies. VDDL

ISOW6441DWEEVM Typical EVM Test Setup Figure 2-3 Typical EVM Test Setup

ISOW6441DWEEVM has many DNP resistors which can be populated or unpopulated to setup the EVM to desired operating test conditions. Table 2-1 lists and describes all the possible test configurations that can be achieved by populating various resistors and jumper options.

Table 2-1 Component Configurations
Component Description
R1 The pin connects LDOs U1, U2 inputs together allowing only one power supply to be used instead of two power supplies.
R2, R15, R18 Populating R15 bypasses LDO U1 allowing VDD to be powered directly from external power supply. When R15 is populated, R2 and R18 needs to be unpopulated to disconnect the LDO. When LDO is not bypassed, the recommended input voltage to LDO must be between 9V and 12V
R5, R7, R9, R11, R13 Sets LDO U1 output voltage to 5V or 3.3V for VDD. Populate only R5 and R9 with 0Ω resistors to set LDO U1 output voltage to 5V (Default Configuration). Populate only R7, R11 and R13 with 0Ω resistors to set LDO U1 output voltage to 3.3V.
R3, R16, R19 To be used for 'V' variant devices only. Populating R16 bypasses LDO U2 allowing VDDL to be powered directly from external power supply. When R16 is populated, R3 and R19 needs to be unpopulated to disconnect the LDO. When LDO is not bypassed, the recommended input voltage to LDO must be between 9V and 12V.
R4, R6, R8, R10, R12, R14 To be used for 'V' variant devices only. Sets LDO U2 output voltage to 5V or 3.3V or 2.5V for VDDL. Populate only R4 and R10 with 0Ω resistors to set LDO U2 output voltage to 5V (Default Configuration). Populate only R6, R12 and R14 with 0Ω resistors to set LDO U2 output voltage to 3.3V. Populate only R8, R12 and R14 with 0Ω resistors to set LDO U2 output voltage to 2.5V.
R22, R23, R24 These resistors allow one input signal connection to multiple input channels.
R17 The pin connects oscillator U3 output signal to U4 inputs allowing EVM to be tested using a test signal without needing any external test signal input.
R20, R21 Populating only R20 sets U3 output signal frequency to 2.5MHz (5Mbps) and populating both R20 and R21 sets the frequency to 5MHz (10Mbps).
R35, R36, R37 These resistors allow one output signal connection to multiple input channels.
R29, R30 Populating R29 sets VISO to 5V and populating R30 sets the pin to 3.3V. Only one of the two resistors needs to be populated.
R38, R39, R40, R41 One or more of these resistors can be populated to facilitate external load to VISO.
C16, C17, C19, C14 Optional capacitors for noise filtering on data lines of primary side.
C33. C31, C32, C34 Optional capacitors for noise filtering on data lines of secondary side.
J4 Jumper option to power ON or OFF the U3 oscillator.