SNAA416A April   2025  – June 2025 LMK3C0105-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Test Setup
    1. 2.1 Board Variation Summary Table
    2. 2.2 Schematics
    3. 2.3 Layouts
    4. 2.4 Stack-Up
  6. 3CISPR-25
    1. 3.1 CISPR-25 Summary
    2. 3.2 CISPR-25 Results
      1. 3.2.1 Monopole
      2. 3.2.2 Bi-Conical
      3. 3.2.3 Log-Periodic
      4. 3.2.4 Horn
  7. 4CISPR-32
    1. 4.1 CISPR-32 Summary
    2. 4.2 CISPR-32 Results
  8. 5Summary
  9. 6References
  10. 7Revision History

2 Test Setup

This application note focuses on two comparisons with different test setups:

  1. Equal comparison between LMK3C0105-Q1 and Oscillators
    1. The EMI performance of LMK3C0105-Q1 was compared with five Kyocera MC2520Z25.0000C19XSH oscillators.
    2. All outputs are 25MHz LVCMOS and terminated with CL= 5pF.
    3. Oscillators are mounted on board with same stackup and power filtering and connected to same capacitive load (CL= 5pF) as LMK3C0105-Q1.
    4. Oscillators are routed with shortest trace possible to CL (66 mil inches) to represent typical use case.
    5. LMK3C0105-Q1 is routed with shortest trace possible (66 mil inches) for best typical clock gen case and 9-12inch traces for worst case (see Section 2.3).
  2. Comparison of LMK3C0105-Q1 across different layouts
    1. The EMI performance of the LMK3C0105-Q1 was recorded across four similar board layouts with one change in the parameter (such as trace length) as outlined in Table 4-11.

All boards were tested in Texas Instruments’ pre-compliant EMI chamber set up for CISPR-25 and CISPR-32.