SNAU277B April   2022  – February 2024 LMK6C , LMK6D , LMK6H , LMK6P

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Evaluation Module Contents
    3. 1.3 Evaluation Setup Requirement
  6. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 Setup
      1. 2.2.1 Connection Diagram
      2. 2.2.2 Power Supply
      3. 2.2.3 Clock Output
      4. 2.2.4 EVM Strap Options
        1. 2.2.4.1 J1 Header
        2. 2.2.4.2 J2 Header
        3. 2.2.4.3 J3 Header
        4. 2.2.4.4 J4 Header
        5. 2.2.4.5 J5 Header
        6. 2.2.4.6 J6 Header
      5. 2.2.5 Configuring the Clock Output Termination
  7. 3Implementation Results
    1. 3.1 Typical Measurement
      1. 3.1.1 Phase Noise
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout and Layer Stack-Up
      1. 4.2.1 PCB Layer Stack-Up
      2. 4.2.2 PCB Layout
    3. 4.3 Bill of Materials
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6References
  11. 7Revision History

J4 Header

J4 is used to pull pin 1 and pin 2 of Y2 to VDD/Gnd to select the output enable (OE) pin of the LMK6x device. The LMK6PA/LMK6DA/LMK6HA variants use pin 1 for OE, and the LMK6PB/ LMK6DB/LMK6HB variants use pin 2. All 4-pin LMK6C variants use pin 1 for OE.