SNIS197A August   2017  – April 2025 LM60-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 LM60-Q1 Transfer Function
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Capacitive Loads
    2. 8.2 Typical Applications
      1. 8.2.1 Full-Range Centigrade Temperature Sensor
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Centigrade Thermostat Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 Conserving Power Dissipation With Shutdown
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
      3. 8.5.3 Thermal Considerations
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Typical Characteristics

To generate these curves, the device is mounted to a printed-circuit board as shown in Figure 8-9 or Figure 8-10.

LM60-Q1 Thermal Resistance Junction to Air (Legacy chip)Figure 6-1 Thermal Resistance Junction to Air (Legacy chip)
LM60-Q1 Thermal Response in Still Air With Heat Sink (Legacy chip)Figure 6-3 Thermal Response in Still Air With Heat Sink (Legacy chip)
LM60-Q1 Thermal Response in Stirred Oil Bath With Heat Sink (0.5 inches × 0.5 inches PCB board)Figure 6-5 Thermal Response in Stirred Oil Bath With Heat Sink (0.5 inches × 0.5 inches PCB board)
LM60-Q1 Thermal Response in Still Air Without a Heat Sink (Legacy chip)Figure 6-7 Thermal Response in Still Air Without a Heat Sink (Legacy chip)
LM60-Q1 Start-Up Voltage vs Temperature (Legacy chip)Figure 6-9 Start-Up Voltage vs Temperature (Legacy chip)
LM60-Q1 Quiescent Current vs Temperature (Legacy chip)Figure 6-11 Quiescent Current vs Temperature (Legacy chip)
LM60-Q1 Accuracy vs Temperature (Legacy chip)Figure 6-13 Accuracy vs Temperature (Legacy chip)
LM60-Q1 Noise Voltage (Legacy chip)Figure 6-15 Noise Voltage (Legacy chip)
LM60-Q1 Supply Current vs Supply Voltage (Legacy chip)
Figure 6-17 Supply Current vs Supply Voltage (Legacy chip)
LM60-Q1 Start-Up Response (Legacy chip)Figure 6-19 Start-Up Response (Legacy chip)
LM60-Q1 Thermal Time Constant (Legacy chip)Figure 6-2 Thermal Time Constant (Legacy chip)
LM60-Q1 Thermal Response in Stirred Oil Bath With Heat Sink (Legacy chip)Figure 6-4 Thermal Response in Stirred Oil Bath With Heat Sink (Legacy chip)
LM60-Q1 Thermal Response in Stirred Oil Bath Without Heat SinkFigure 6-6 Thermal Response in Stirred Oil Bath Without Heat Sink
LM60-Q1 Thermal Response in Still Air Without a Heat Sink (Both Legacy and New chip in the new test setup)Figure 6-8 Thermal Response in Still Air Without a Heat Sink (Both Legacy and New chip in the new test setup)
LM60-Q1 Start-Up Voltage vs Temperature (New chip)Figure 6-10 Start-Up Voltage vs Temperature (New chip)
LM60-Q1 Quiescent Current vs Temperature (New chip)Figure 6-12 Quiescent Current vs Temperature (New chip)
LM60-Q1 Accuracy vs Temperature (New chip)Figure 6-14 Accuracy vs Temperature (New chip)
LM60-Q1 Noise Voltage (New chip)Figure 6-16 Noise Voltage (New chip)
LM60-Q1 Supply Current vs Supply Voltage (New chip)Figure 6-18 Supply Current vs Supply Voltage (New chip)
LM60-Q1 Start-Up Response (New chip)Figure 6-20 Start-Up Response (New chip)