SNLA389F October   2022  – August 2025 DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TC813R-Q1 , DP83TC813S-Q1 , DP83TC814R-Q1 , DP83TC814S-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Configuration
    1. 2.1 Schematic
  6. 3Software Configuration
  7. 4Testing PMA
    1. 4.1 PMA Testing Procedure
  8. 5Testing IOP: Link-up and Link-down
    1. 5.1 IOP Testing Procedure
  9. 6Testing SQI
    1. 6.1 SQI Value Interpretation
  10. 7Testing TDR
    1. 7.1 TDR Testing Procedure
  11. 8Testing EMC and EMI
  12. 9Revision History

4.1 PMA Testing Procedure

Note:
  • Before programming any of the test modes, DP83TC81x need to be loaded with the respective initialization register configuration (master or slave) as described in Section 3.
Table 4-1 Programming PMA Test Modes
TEST MODEMMDREGISTERVALUE
Test Mode 1x010x08360x2000
Test Mode 2x010x08360x4000
Test Mode 4: Tx_Tclk 25 MHz on the CLKOUT pin.x010x08360x8000
x1F0x045F

0x000D (DP83TC812/814)

0x0007 (DP83TC813)

Test Mode 5x010x08360xA000