SNLA421 December   2022 DS320PR810 , SN75LVPE5412 , SN75LVPE5421

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Add-in-Card (AIC) Form Factor
  4. 2Compliance Tests
    1. 2.1 Workshop Test Results
    2. 2.2 Electrical Testing Results
  5. 3Electrical Performance
    1. 3.1 Effects of EQ Index on Time Domain Signal
    2. 3.2 Effects of EQ Index on the Eye Diagram
    3. 3.3 Effects of DC Gain on Time Domain Signal
    4. 3.4 Effects of DC Gain on the Eye Diagram
  6. 4Compliance Setting Fine Tuning
  7. 5Summary
  8. 6References

Add-in-Card (AIC) Form Factor

To participate in system and electrical testing, the redrivers were designed onto an AIC which can also accommodate a standard PCIe endpoint which is compliant to the PCIe standard. This endpoint acts as the redrivers test partner; the test partner is used to transmit compliant PCIe Tx presets, perform loopback, and inter operate with Host system components. The redriver and the AIC to which the redriver is mounted must be designed to allow any and all normal PCIe link configuration and activity. This design includes some of the following items:

  • Receiver Detection
  • PCIe Reset
  • PCIe Speed Changes
  • Equalization Link Training

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Figure 1-1 DS320PR810 Riser Card EVM