SNLA465 January 2025 DP83TC817S-Q1 , DP83TC818S-Q1 , DP83TG721S-Q1
DP83TG721 and DP83TC817/8 also support Event Triggers and Monitors on the PHY’s GPIO pins to offload some of the processor overhead of generating these for TSN applications. Event Triggers are GPIO generated PWM waveforms that are aligned with the Wall Clock. These can be used to generate synchronized pulse per second (PPS) waveforms, or 1Hz PWM waveforms.
Event monitors are input waveforms to GPIO pins that can be timestamped for every rising or falling edge. These features are useful for applications such as below, where you want to synchronize an input coming from some receiver to an output going to a transceiver that is connected via Ethernet.
Figure 5-1 shows PPS input and PPS output are synchronized through PTP. Both are received and generated by the processor.
Figure 5-1 Example PPS
ApplicationFigure 5-2 shows PPS input and PPS output are synchronized through PTP. Both are received and generated by the PHY, offloading the processor overhead from the previous figure.
Figure 5-2 Application of PHY Event
Monitor and Triggers