SNLU302 March 2025 DS320PR810 , DS320PR822
The DS320PR810 has two types of registers:
Both Share and Channel registers of a single channel bank are contained within a single register page as shown in Table 2-1.
| Address Range | Channel Bank 0 Access | Channel Bank 1 Access |
|---|---|---|
| 0x00 - 0x1F | Channel 0 registers | Channel 4 registers |
| 0x20 - 0x3F | Channel 1 registers | Channel 5 registers |
| 0x40 - 0x5F | Channel 2 registers | Channel 6 registers |
| 0x60 - 0x7F | Channel 3 registers | Channel 7 registers |
| 0x80 - 0x9F | Broadcast write channel bank 0 registers, read channel 0 registers | Broadcast write channel bank 1 registers, read channel 4 registers |
| 0xA0 - 0xBF | Broadcast write channel 0-1 registers, read channel 0 registers | Broadcast write channel 4-5 registers, read channel 4 registers |
| 0xC0 - 0xDF | Broadcast write channel 2-3 registers, read channel 2 registers | Broadcast write channel 6-7 registers, read channel 6 registers |
| 0xE0 - 0xFF | Bank 0 Share registers | Bank 1 Share registers |
Complex bit access types are encoded to fit into small table cells. Table 2-2 shows the codes that are used for access types in this section.
| Access Type | Code | Description |
|---|---|---|
| Read Type | ||
| R | R | Read only access. |
| Write Type | ||
| R/W | R/W | Read / Write access. |
| R/W/SC | R/W/SC | Read / Write access, self-clearing |
| Reset or Default Value | ||
| -n | Value after reset or the default value. | |